6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-08-15 06:29:05 +00:00
Code Issues Projects Releases Wiki Activity

Add facility for pre-RA passes

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50165 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Anton Korobeynikov
2008-04-23 18:22:28 +00:00
parent aadc780a56
commit 769b481e9f
2 changed files with 12 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7
include/llvm/Target/TargetMachine.h
View File

@@ -281,6 +281,13 @@ public:
return true; return true;
} }
/// addPreRegAllocPasses - This method may be implemented by targets that want
/// to run passes immediately before register allocation. This should return
/// true if -print-machineinstrs should print after these passes.
virtual bool addPreRegAlloc(PassManagerBase &PM, bool Fast) {
return false;
}
/// addPostRegAllocPasses - This method may be implemented by targets that /// addPostRegAllocPasses - This method may be implemented by targets that
/// want to run passes after register allocation but before prolog-epilog /// want to run passes after register allocation but before prolog-epilog
/// insertion. This should return true if -print-machineinstrs should print /// insertion. This should return true if -print-machineinstrs should print

4
lib/CodeGen/LLVMTargetMachine.cpp
View File

@@ -94,6 +94,10 @@ LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
if (EnableSinking) if (EnableSinking)
PM.add(createMachineSinkingPass()); PM.add(createMachineSinkingPass());
// Run pre-ra passes.
if (addPreRegAlloc(PM, Fast) && PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
// Perform register allocation to convert to a concrete x86 representation // Perform register allocation to convert to a concrete x86 representation
PM.add(createRegisterAllocator()); PM.add(createRegisterAllocator());