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Add XCore intrinsic for crc32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132336 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -11,6 +11,7 @@
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let TargetPrefix = "xcore" in { // All intrinsics start with "llvm.xcore.".
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let TargetPrefix = "xcore" in { // All intrinsics start with "llvm.xcore.".
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// Miscellaneous instructions.
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// Miscellaneous instructions.
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def int_xcore_bitrev : Intrinsic<[llvm_i32_ty],[llvm_i32_ty],[IntrNoMem]>;
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def int_xcore_bitrev : Intrinsic<[llvm_i32_ty],[llvm_i32_ty],[IntrNoMem]>;
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def int_xcore_crc32 : Intrinsic<[llvm_i32_ty],[llvm_i32_ty,llvm_i32_ty,llvm_i32_ty],[IntrNoMem]>;
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def int_xcore_getid : Intrinsic<[llvm_i32_ty],[],[IntrNoMem]>;
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def int_xcore_getid : Intrinsic<[llvm_i32_ty],[],[IntrNoMem]>;
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def int_xcore_getps : Intrinsic<[llvm_i32_ty],[llvm_i32_ty]>;
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def int_xcore_getps : Intrinsic<[llvm_i32_ty],[llvm_i32_ty]>;
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def int_xcore_setps : Intrinsic<[],[llvm_i32_ty, llvm_i32_ty]>;
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def int_xcore_setps : Intrinsic<[],[llvm_i32_ty, llvm_i32_ty]>;
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@ -472,7 +472,13 @@ def REMU_l3r : FL3R<"remu", urem>;
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}
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}
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def XOR_l3r : FL3R<"xor", xor>;
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def XOR_l3r : FL3R<"xor", xor>;
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defm ASHR : FL3R_L2RBITP<"ashr", sra>;
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defm ASHR : FL3R_L2RBITP<"ashr", sra>;
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// TODO crc32, crc8, inpw, outpw
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let Constraints = "$src1 = $dst" in
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def CRC_l3r : _FL3R<(outs GRRegs:$dst), (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3),
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"crc32 $dst, $src2, $src3",
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[(set GRRegs:$dst, (int_xcore_crc32 GRRegs:$src1, GRRegs:$src2, GRRegs:$src3))]>;
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// TODO inpw, outpw
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let mayStore=1 in {
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let mayStore=1 in {
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def ST16_l3r : _FL3R<(outs), (ins GRRegs:$val, GRRegs:$addr, GRRegs:$offset),
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def ST16_l3r : _FL3R<(outs), (ins GRRegs:$val, GRRegs:$addr, GRRegs:$offset),
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"st16 $val, $addr[$offset]",
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"st16 $val, $addr[$offset]",
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@ -1,9 +0,0 @@
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; RUN: llc < %s -march=xcore | FileCheck %s
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declare i32 @llvm.xcore.bitrev(i32)
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define i32 @bitrev(i32 %val) {
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; CHECK: bitrev:
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; CHECK: bitrev r0, r0
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%result = call i32 @llvm.xcore.bitrev(i32 %val)
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ret i32 %result
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}
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17
test/CodeGen/XCore/misc-intrinsics.ll
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17
test/CodeGen/XCore/misc-intrinsics.ll
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@ -0,0 +1,17 @@
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; RUN: llc < %s -march=xcore | FileCheck %s
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declare i32 @llvm.xcore.bitrev(i32)
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declare i32 @llvm.xcore.crc32(i32, i32, i32)
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define i32 @bitrev(i32 %val) {
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; CHECK: bitrev:
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; CHECK: bitrev r0, r0
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%result = call i32 @llvm.xcore.bitrev(i32 %val)
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ret i32 %result
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}
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define i32 @crc32(i32 %crc, i32 %data, i32 %poly) {
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; CHECK: crc32:
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; CHECK: crc32 r0, r1, r2
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%result = call i32 @llvm.xcore.crc32(i32 %crc, i32 %data, i32 %poly)
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ret i32 %result
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}
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