Correct disassembly printing of Thumb2 post-incremented LDRD and STRD.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139639 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Owen Anderson 2011-09-13 20:46:26 +00:00
parent d7a2b3bea8
commit 7782a58b87
3 changed files with 20 additions and 6 deletions

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@ -1441,7 +1441,7 @@ def t2LDRD_PRE : T2Ii8s4<1, 1, 1, (outs rGPR:$Rt, rGPR:$Rt2, GPR:$wb),
def t2LDRD_POST : T2Ii8s4post<0, 1, 1, (outs rGPR:$Rt, rGPR:$Rt2, GPR:$wb),
(ins addr_offset_none:$addr, t2am_imm8s4_offset:$imm),
IIC_iLoad_d_ru, "ldrd", "\t$Rt, $Rt2, $addr, $imm",
IIC_iLoad_d_ru, "ldrd", "\t$Rt, $Rt2, $addr$imm",
"$addr.base = $wb", []>;
def t2STRD_PRE : T2Ii8s4<1, 1, 0, (outs GPR:$wb),
@ -1455,7 +1455,7 @@ def t2STRD_PRE : T2Ii8s4<1, 1, 0, (outs GPR:$wb),
def t2STRD_POST : T2Ii8s4post<0, 1, 0, (outs GPR:$wb),
(ins rGPR:$Rt, rGPR:$Rt2, addr_offset_none:$addr,
t2am_imm8s4_offset:$imm),
IIC_iStore_d_ru, "strd", "\t$Rt, $Rt2, $addr, $imm",
IIC_iStore_d_ru, "strd", "\t$Rt, $Rt2, $addr$imm",
"$addr.base = $wb", []>;
// T2Ipl (Preload Data/Instruction) signals the memory system of possible future

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@ -842,10 +842,13 @@ void ARMInstPrinter::printT2AddrModeImm8s4OffsetOperand(const MCInst *MI,
const MCOperand &MO1 = MI->getOperand(OpNum);
int32_t OffImm = (int32_t)MO1.getImm() / 4;
// Don't print +0.
if (OffImm < 0)
O << "#-" << -OffImm * 4;
else if (OffImm > 0)
O << "#" << OffImm * 4;
if (OffImm != 0) {
O << ", ";
if (OffImm < 0)
O << "#-" << -OffImm * 4;
else if (OffImm > 0)
O << "#" << OffImm * 4;
}
}
void ARMInstPrinter::printT2AddrModeSoRegOperand(const MCInst *MI,

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@ -945,3 +945,14 @@
0xf5 0x1b
0x11 0x1d
#------------------------------------------------------------------------------
# STRD (immediate)
#------------------------------------------------------------------------------
# CHECK: strd r6, r3, [r5], #-8
# CHECK-NOT: strd r8, r5, [r5],
# CHECK: strd r7, r4, [r5], #-4
0x65 0xe8 0x02 0x63
0x65 0xe8 0x00 0x85
0x65 0xe8 0x01 0x74