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Remember if LR register has been spilled in this function.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33632 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2007-01-29 22:22:24 +00:00
parent 1620f1ad91
commit 78268b9436
2 changed files with 17 additions and 5 deletions
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16
lib/Target/ARM/ARMMachineFunctionInfo.h
View File

@ -36,6 +36,10 @@ class ARMFunctionInfo : public MachineFunctionInfo {
/// processFunctionBeforeCalleeSavedScan(). /// processFunctionBeforeCalleeSavedScan().
bool HasStackFrame; bool HasStackFrame;
/// LRSpilled - True if the LR register has been spilled.
///
bool LRSpilled;
/// FramePtrSpillOffset - If HasStackFrame, this records the frame pointer /// FramePtrSpillOffset - If HasStackFrame, this records the frame pointer
/// spill stack offset. /// spill stack offset.
unsigned FramePtrSpillOffset; unsigned FramePtrSpillOffset;
@ -71,14 +75,14 @@ class ARMFunctionInfo : public MachineFunctionInfo {
public: public:
ARMFunctionInfo() : ARMFunctionInfo() :
isThumb(false), isThumb(false),
VarArgsRegSaveSize(0), HasStackFrame(false), FramePtrSpillOffset(0), VarArgsRegSaveSize(0), HasStackFrame(false), LRSpilled(false),
GPRCS1Offset(0), GPRCS2Offset(0), DPRCSOffset(0), FramePtrSpillOffset(0), GPRCS1Offset(0), GPRCS2Offset(0), DPRCSOffset(0),
GPRCS1Size(0), GPRCS2Size(0), DPRCSSize(0), JumpTableUId(0) {} GPRCS1Size(0), GPRCS2Size(0), DPRCSSize(0), JumpTableUId(0) {}
ARMFunctionInfo(MachineFunction &MF) : ARMFunctionInfo(MachineFunction &MF) :
isThumb(MF.getTarget().getSubtarget<ARMSubtarget>().isThumb()), isThumb(MF.getTarget().getSubtarget<ARMSubtarget>().isThumb()),
VarArgsRegSaveSize(0), HasStackFrame(false), FramePtrSpillOffset(0), VarArgsRegSaveSize(0), HasStackFrame(false), LRSpilled(false),
GPRCS1Offset(0), GPRCS2Offset(0), DPRCSOffset(0), FramePtrSpillOffset(0), GPRCS1Offset(0), GPRCS2Offset(0), DPRCSOffset(0),
GPRCS1Size(0), GPRCS2Size(0), DPRCSSize(0), JumpTableUId(0) {} GPRCS1Size(0), GPRCS2Size(0), DPRCSSize(0), JumpTableUId(0) {}
bool isThumbFunction() const { return isThumb; } bool isThumbFunction() const { return isThumb; }
@ -88,6 +92,10 @@ public:
bool hasStackFrame() const { return HasStackFrame; } bool hasStackFrame() const { return HasStackFrame; }
void setHasStackFrame(bool s) { HasStackFrame = s; } void setHasStackFrame(bool s) { HasStackFrame = s; }
bool isLRSpilled() const { return LRSpilled; }
void setLRIsSpilled(bool s) { LRSpilled = s; }
unsigned getFramePtrSpillOffset() const { return FramePtrSpillOffset; } unsigned getFramePtrSpillOffset() const { return FramePtrSpillOffset; }
void setFramePtrSpillOffset(unsigned o) { FramePtrSpillOffset = o; } void setFramePtrSpillOffset(unsigned o) { FramePtrSpillOffset = o; }

6
lib/Target/ARM/ARMRegisterInfo.cpp
View File

@ -769,13 +769,14 @@ processFunctionBeforeCalleeSavedScan(MachineFunction &MF) const {
} }
} }
ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
if (!CanEliminateFrame) { if (!CanEliminateFrame) {
ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
AFI->setHasStackFrame(true); AFI->setHasStackFrame(true);
// If LR is not spilled, but at least one of R4, R5, R6, and R7 is spilled. // If LR is not spilled, but at least one of R4, R5, R6, and R7 is spilled.
// Spill LR as well so we can fold BX_RET to the registers restore (LDM). // Spill LR as well so we can fold BX_RET to the registers restore (LDM).
if (!LRSpilled && CS1Spilled) { if (!LRSpilled && CS1Spilled) {
LRSpilled = true;
MF.changePhyRegUsed(ARM::LR, true); MF.changePhyRegUsed(ARM::LR, true);
NumGPRSpills++; NumGPRSpills++;
UnspilledCS1GPRs.erase(std::find(UnspilledCS1GPRs.begin(), UnspilledCS1GPRs.erase(std::find(UnspilledCS1GPRs.begin(),
@ -798,6 +799,9 @@ processFunctionBeforeCalleeSavedScan(MachineFunction &MF) const {
MF.changePhyRegUsed(UnspilledCS2GPRs.front(), true); MF.changePhyRegUsed(UnspilledCS2GPRs.front(), true);
} }
} }
// Remembe if LR has been spilled.
AFI->setLRIsSpilled(LRSpilled);
} }
/// Move iterator pass the next bunch of callee save load / store ops for /// Move iterator pass the next bunch of callee save load / store ops for