From 79217064c618afecd4979aec6d2e8fe784565931 Mon Sep 17 00:00:00 2001 From: Dale Johannesen Date: Tue, 23 Oct 2007 23:20:14 +0000 Subject: [PATCH] Disable a couple more things for ppcf128. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43267 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCISelLowering.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index e3610f89941..9c2016ce79f 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -3143,7 +3143,8 @@ SDOperand PPCTargetLowering::PerformDAGCombine(SDNode *N, // Turn (sint_to_fp (fp_to_sint X)) -> fctidz/fcfid without load/stores. // We allow the src/dst to be either f32/f64, but the intermediate // type must be i64. - if (N->getOperand(0).getValueType() == MVT::i64) { + if (N->getOperand(0).getValueType() == MVT::i64 && + N->getOperand(0).getOperand(0).getValueType() != MVT::ppcf128) { SDOperand Val = N->getOperand(0).getOperand(0); if (Val.getValueType() == MVT::f32) { Val = DAG.getNode(ISD::FP_EXTEND, MVT::f64, Val); @@ -3170,7 +3171,8 @@ SDOperand PPCTargetLowering::PerformDAGCombine(SDNode *N, // Turn STORE (FP_TO_SINT F) -> STFIWX(FCTIWZ(F)). if (TM.getSubtarget().hasSTFIWX() && N->getOperand(1).getOpcode() == ISD::FP_TO_SINT && - N->getOperand(1).getValueType() == MVT::i32) { + N->getOperand(1).getValueType() == MVT::i32 && + N->getOperand(1).getOperand(0).getValueType() != MVT::ppcf128) { SDOperand Val = N->getOperand(1).getOperand(0); if (Val.getValueType() == MVT::f32) { Val = DAG.getNode(ISD::FP_EXTEND, MVT::f64, Val);