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ARM Disassembler: sign extend branch immediates.

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Not sure about BLXi, but this is what the old disassembler did.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137156 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Benjamin Kramer 2011-08-09 22:02:50 +00:00
parent 51157d2234
commit 793b811c50
2 changed files with 5 additions and 2 deletions
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4
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
View File

@ -1214,11 +1214,11 @@ static bool DecodeBranchImmInstruction(llvm::MCInst &Inst, unsigned Insn,
if (pred == 0xF) {
Inst.setOpcode(ARM::BLXi);
imm |= fieldFromInstruction32(Insn, 24, 1) << 1;
Inst.addOperand(MCOperand::CreateImm(imm));
Inst.addOperand(MCOperand::CreateImm(SignExtend32<26>(imm)));
return true;
}
Inst.addOperand(MCOperand::CreateImm(imm));
Inst.addOperand(MCOperand::CreateImm(SignExtend32<26>(imm)));
if (!DecodePredicateOperand(Inst, pred, Address, Decoder)) return false;
return true;

3
test/MC/Disassembler/ARM/arm-tests.txt
View File

@ -248,6 +248,9 @@
# CHECK: stc2 p2, cr4, [r9], {157}
0x9d 0x42 0x89 0xfc
# CHECK: bne #-24
0xfa 0xff 0xff 0x1a
# CHECK: blx #60
0x0f 0x00 0x00 0xfa