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Fix a number of clang -Wsign-compare warnings that didn't have an obvious

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solution.  The only reason these don't fire with gcc-4.2 is that gcc turns off
part of -Wsign-compare in C++ on accident.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100581 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
John McCall 2010-04-06 23:35:53 +00:00
parent 49d915bb9a
commit 795ee9dd1e
5 changed files with 5 additions and 5 deletions
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2
lib/CodeGen/AsmPrinter/DwarfDebug.cpp
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@ -1542,7 +1542,7 @@ DIE *DwarfDebug::constructVariableDIE(DbgVariable *DV, DbgScope *Scope) {
const APInt FltVal = FPImm.bitcastToAPInt();
const char *FltPtr = (const char*)FltVal.getRawData();
unsigned NumBytes = FltVal.getBitWidth() / 8; // 8 bits per byte.
int NumBytes = FltVal.getBitWidth() / 8; // 8 bits per byte.
bool LittleEndian = Asm->getTargetData().isLittleEndian();
int Incr = (LittleEndian ? 1 : -1);
int Start = (LittleEndian ? 0 : NumBytes - 1);

2
lib/CodeGen/VirtRegRewriter.cpp
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@ -895,7 +895,7 @@ unsigned ReuseInfo::GetRegForReload(const TargetRegisterClass *RC,
bool DoReMat = NewOp.StackSlotOrReMat > VirtRegMap::MAX_STACK_SLOT;
int SSorRMId = DoReMat
? VRM.getReMatId(NewOp.VirtReg) : NewOp.StackSlotOrReMat;
? VRM.getReMatId(NewOp.VirtReg) : (int) NewOp.StackSlotOrReMat;
// Back-schedule reloads and remats.
MachineBasicBlock::iterator InsertLoc =

2
lib/Target/SystemZ/SystemZRegisterInfo.cpp
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@ -200,7 +200,7 @@ void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
uint64_t ThisVal = (Offset > Chunk) ? Chunk : Offset;
MachineInstr *MI =
BuildMI(MBB, MBBI, DL, TII.get(Opc), SystemZ::R15D)
.addReg(SystemZ::R15D).addImm((isSub ? -(int64_t)ThisVal : ThisVal));
.addReg(SystemZ::R15D).addImm(isSub ? -ThisVal : ThisVal);
// The PSW implicit def is dead.
MI->getOperand(3).setIsDead();
Offset -= ThisVal;

2
lib/Target/X86/SSEDomainFix.cpp
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@ -159,7 +159,7 @@ int SSEDomainFixPass::RegIndex(unsigned reg) {
// We just need them to be consecutive, ordering doesn't matter.
assert(X86::XMM9 == X86::XMM0+NumRegs-1 && "Unexpected sort");
reg -= X86::XMM0;
return reg < NumRegs ? reg : -1;
return reg < NumRegs ? (int) reg : -1;
}
DomainValue *SSEDomainFixPass::Alloc(int domain) {

2
lib/Target/X86/X86FastISel.cpp
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@ -305,7 +305,7 @@ bool X86FastISel::X86FastEmitStore(EVT VT, Value *Val,
if (Opc) {
addFullAddress(BuildMI(MBB, DL, TII.get(Opc)), AM)
.addImm(Signed ? CI->getSExtValue() :
.addImm(Signed ? (uint64_t) CI->getSExtValue() :
CI->getZExtValue());
return true;
}