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https://github.com/c64scene-ar/llvm-6502.git
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R600/SI: Fix broken check prefixes in test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221565 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault
parent
bbfcec17e4
commit
79da624ab2
@ -1,5 +1,4 @@
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; RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI --check-prefix=FUNC %s
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; RUN: llc < %s -march=r600 -mcpu=bonaire -verify-machineinstrs | FileCheck --check-prefix=CI --check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; On Southern Islands GPUs the local address space(3) uses 32-bit pointers and
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; the global address space(1) uses 64-bit pointers. These tests check to make sure
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@ -11,8 +10,8 @@
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; instructions with B64, U64, and I64 take 64-bit operands.
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; FUNC-LABEL: {{^}}local_address_load:
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; CHECK: v_mov_b32_e{{32|64}} [[PTR:v[0-9]]]
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; CHECK: ds_read_b32 v{{[0-9]+}}, [[PTR]]
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; SI: v_mov_b32_e{{32|64}} [[PTR:v[0-9]]]
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; SI: ds_read_b32 v{{[0-9]+}}, [[PTR]]
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define void @local_address_load(i32 addrspace(1)* %out, i32 addrspace(3)* %in) {
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entry:
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%0 = load i32 addrspace(3)* %in
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@ -21,9 +20,9 @@ entry:
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}
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; FUNC-LABEL: {{^}}local_address_gep:
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; CHECK: s_add_i32 [[SPTR:s[0-9]]]
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; CHECK: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[SPTR]]
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; CHECK: ds_read_b32 [[VPTR]]
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; SI: s_add_i32 [[SPTR:s[0-9]]]
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; SI: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[SPTR]]
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; SI: ds_read_b32 [[VPTR]]
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define void @local_address_gep(i32 addrspace(1)* %out, i32 addrspace(3)* %in, i32 %offset) {
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entry:
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%0 = getelementptr i32 addrspace(3)* %in, i32 %offset
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@ -33,8 +32,8 @@ entry:
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}
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; FUNC-LABEL: {{^}}local_address_gep_const_offset:
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; CHECK: v_mov_b32_e32 [[VPTR:v[0-9]+]], s{{[0-9]+}}
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; CHECK: ds_read_b32 v{{[0-9]+}}, [[VPTR]], 0x4,
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; SI: v_mov_b32_e32 [[VPTR:v[0-9]+]], s{{[0-9]+}}
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; SI: ds_read_b32 v{{[0-9]+}}, [[VPTR]] offset:4
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define void @local_address_gep_const_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %in) {
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entry:
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%0 = getelementptr i32 addrspace(3)* %in, i32 1
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@ -45,9 +44,9 @@ entry:
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; Offset too large, can't fold into 16-bit immediate offset.
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; FUNC-LABEL: {{^}}local_address_gep_large_const_offset:
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; CHECK: s_add_i32 [[SPTR:s[0-9]]], s{{[0-9]+}}, 0x10004
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; CHECK: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[SPTR]]
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; CHECK: ds_read_b32 [[VPTR]]
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; SI: s_add_i32 [[SPTR:s[0-9]]], s{{[0-9]+}}, 0x10004
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; SI: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[SPTR]]
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; SI: ds_read_b32 [[VPTR]]
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define void @local_address_gep_large_const_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %in) {
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entry:
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%0 = getelementptr i32 addrspace(3)* %in, i32 16385
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@ -57,9 +56,9 @@ entry:
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}
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; FUNC-LABEL: {{^}}null_32bit_lds_ptr:
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; CHECK: v_cmp_ne_i32
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; CHECK-NOT: v_cmp_ne_i32
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; CHECK: V_CNDMASK_B32
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; SI: v_cmp_ne_i32
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; SI-NOT: v_cmp_ne_i32
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; SI: v_cndmask_b32
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define void @null_32bit_lds_ptr(i32 addrspace(1)* %out, i32 addrspace(3)* %lds) nounwind {
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%cmp = icmp ne i32 addrspace(3)* %lds, null
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%x = select i1 %cmp, i32 123, i32 456
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@ -68,9 +67,9 @@ define void @null_32bit_lds_ptr(i32 addrspace(1)* %out, i32 addrspace(3)* %lds)
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}
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; FUNC-LABEL: {{^}}mul_32bit_ptr:
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; CHECK: v_mul_lo_i32
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; CHECK-NEXT: v_add_i32_e32
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; CHECK-NEXT: ds_read_b32
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; SI: s_mul_i32
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; SI-NEXT: s_add_i32
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; SI: ds_read_b32
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define void @mul_32bit_ptr(float addrspace(1)* %out, [3 x float] addrspace(3)* %lds, i32 %tid) {
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%ptr = getelementptr [3 x float] addrspace(3)* %lds, i32 %tid, i32 0
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%val = load float addrspace(3)* %ptr
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@ -81,8 +80,8 @@ define void @mul_32bit_ptr(float addrspace(1)* %out, [3 x float] addrspace(3)* %
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@g_lds = addrspace(3) global float zeroinitializer, align 4
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; FUNC-LABEL: {{^}}infer_ptr_alignment_global_offset:
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; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], 0
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; CHECK: ds_read_b32 v{{[0-9]+}}, [[REG]]
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; SI: v_mov_b32_e32 [[REG:v[0-9]+]], 0
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; SI: ds_read_b32 v{{[0-9]+}}, [[REG]]
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define void @infer_ptr_alignment_global_offset(float addrspace(1)* %out, i32 %tid) {
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%val = load float addrspace(3)* @g_lds
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store float %val, float addrspace(1)* %out
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@ -94,23 +93,23 @@ define void @infer_ptr_alignment_global_offset(float addrspace(1)* %out, i32 %ti
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@dst = addrspace(3) global [16384 x i32] zeroinitializer
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; FUNC-LABEL: {{^}}global_ptr:
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; CHECK: ds_write_b32
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; SI: ds_write_b32
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define void @global_ptr() nounwind {
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store i32 addrspace(3)* getelementptr ([16384 x i32] addrspace(3)* @dst, i32 0, i32 16), i32 addrspace(3)* addrspace(3)* @ptr
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ret void
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}
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; FUNC-LABEL: {{^}}local_address_store:
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; CHECK: ds_write_b32
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; SI: ds_write_b32
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define void @local_address_store(i32 addrspace(3)* %out, i32 %val) {
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store i32 %val, i32 addrspace(3)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}local_address_gep_store:
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; CHECK: s_add_i32 [[SADDR:s[0-9]+]],
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; CHECK: v_mov_b32_e32 [[ADDR:v[0-9]+]], [[SADDR]]
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; CHECK: ds_write_b32 [[ADDR]], v{{[0-9]+}},
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; SI: s_add_i32 [[SADDR:s[0-9]+]],
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; SI: v_mov_b32_e32 [[ADDR:v[0-9]+]], [[SADDR]]
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; SI: ds_write_b32 [[ADDR]], v{{[0-9]+}}
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define void @local_address_gep_store(i32 addrspace(3)* %out, i32, i32 %val, i32 %offset) {
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%gep = getelementptr i32 addrspace(3)* %out, i32 %offset
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store i32 %val, i32 addrspace(3)* %gep, align 4
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@ -118,9 +117,9 @@ define void @local_address_gep_store(i32 addrspace(3)* %out, i32, i32 %val, i32
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}
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; FUNC-LABEL: {{^}}local_address_gep_const_offset_store:
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; CHECK: v_mov_b32_e32 [[VPTR:v[0-9]+]], s{{[0-9]+}}
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; CHECK: v_mov_b32_e32 [[VAL:v[0-9]+]], s{{[0-9]+}}
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; CHECK: ds_write_b32 [[VPTR]], [[VAL]], 0x4
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; SI: v_mov_b32_e32 [[VPTR:v[0-9]+]], s{{[0-9]+}}
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; SI: v_mov_b32_e32 [[VAL:v[0-9]+]], s{{[0-9]+}}
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; SI: ds_write_b32 [[VPTR]], [[VAL]] offset:4
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define void @local_address_gep_const_offset_store(i32 addrspace(3)* %out, i32 %val) {
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%gep = getelementptr i32 addrspace(3)* %out, i32 1
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store i32 %val, i32 addrspace(3)* %gep, align 4
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@ -129,9 +128,9 @@ define void @local_address_gep_const_offset_store(i32 addrspace(3)* %out, i32 %v
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; Offset too large, can't fold into 16-bit immediate offset.
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; FUNC-LABEL: {{^}}local_address_gep_large_const_offset_store:
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; CHECK: s_add_i32 [[SPTR:s[0-9]]], s{{[0-9]+}}, 0x10004
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; CHECK: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[SPTR]]
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; CHECK: ds_write_b32 [[VPTR]], v{{[0-9]+}}, 0
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; SI: s_add_i32 [[SPTR:s[0-9]]], s{{[0-9]+}}, 0x10004
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; SI: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[SPTR]]
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; SI: ds_write_b32 [[VPTR]], v{{[0-9]+}} [M0]{{$}}
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define void @local_address_gep_large_const_offset_store(i32 addrspace(3)* %out, i32 %val) {
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%gep = getelementptr i32 addrspace(3)* %out, i32 16385
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store i32 %val, i32 addrspace(3)* %gep, align 4
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