6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-29 10:32:47 +00:00
Code Issues Projects Releases Wiki Activity

Should be using Bcc (average) latency to determine if-conversion threshold, not BL.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73759 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2009-06-19 06:56:26 +00:00
parent 2fb070bf5a
commit 7a42b08be8
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
lib/Target/ARM/ARMISelLowering.cpp
View File

@ -296,7 +296,7 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
// Use branch latency information to determine if-conversion limits.
const TargetInstrInfo *TII = getTargetMachine().getInstrInfo();
const InstrItineraryData &InstrItins = Subtarget->getInstrItineraryData();
unsigned Latency = InstrItins.getLatency(TII->get(ARM::BL).getSchedClass());
unsigned Latency= InstrItins.getLatency(TII->get(ARM::Bcc).getSchedClass());
if (Latency > 1) {
setIfCvtBlockSizeLimit(Latency-1);
if (Latency > 2)