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Configure the asmwriter to allow constant pools to be printed correctly

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24841 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-12-18 23:35:05 +00:00
parent b04c5c8eb2
commit 7a48e5018b
4 changed files with 4 additions and 2 deletions
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2
lib/Target/Sparc/SparcAsmPrinter.cpp
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@ -40,6 +40,8 @@ namespace {
Data32bitsDirective = "\t.word\t";
Data64bitsDirective = "\t.xword\t";
ZeroDirective = 0; // no .zero or .space!
CommentString = "!";
ConstantPoolSection = "\t.section \".rodata\",#alloc\n";
}
/// We name each basic block in a Function with a unique number, so

1
lib/Target/Sparc/SparcInstrInfo.td
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@ -715,7 +715,6 @@ def : Pat<(V8lo tconstpool:$in), (ORri G0, tconstpool:$in)>;
def : Pat<(retflag ICC/*HACK*/), (RETL)>;
// Map integer extload's to zextloads.
// Handling 1 bit extload
def : Pat<(i32 (extload ADDRrr:$src, i1)), (LDUBrr ADDRrr:$src)>;
def : Pat<(i32 (extload ADDRri:$src, i1)), (LDUBri ADDRri:$src)>;
def : Pat<(i32 (extload ADDRrr:$src, i8)), (LDUBrr ADDRrr:$src)>;

2
lib/Target/SparcV8/SparcV8AsmPrinter.cpp
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@ -40,6 +40,8 @@ namespace {
Data32bitsDirective = "\t.word\t";
Data64bitsDirective = "\t.xword\t";
ZeroDirective = 0; // no .zero or .space!
CommentString = "!";
ConstantPoolSection = "\t.section \".rodata\",#alloc\n";
}
/// We name each basic block in a Function with a unique number, so

1
lib/Target/SparcV8/SparcV8InstrInfo.td
View File

@ -715,7 +715,6 @@ def : Pat<(V8lo tconstpool:$in), (ORri G0, tconstpool:$in)>;
def : Pat<(retflag ICC/*HACK*/), (RETL)>;
// Map integer extload's to zextloads.
// Handling 1 bit extload
def : Pat<(i32 (extload ADDRrr:$src, i1)), (LDUBrr ADDRrr:$src)>;
def : Pat<(i32 (extload ADDRri:$src, i1)), (LDUBri ADDRri:$src)>;
def : Pat<(i32 (extload ADDRrr:$src, i8)), (LDUBrr ADDRrr:$src)>;