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[SelectionDAG] Move RegsForValue into SelectionDAGBuilder.h. NFC.
Summary: The exported class will be used in later change, in StatepointLowering.cpp. It is still internal to SelectionDAG (not exported via include/). Reviewers: reames, atrick Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9478 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236554 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sanjoy Das
parent
49d19ee888
commit
7aab5ee93d
@ -22,7 +22,6 @@
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#include "llvm/Analysis/ConstantFolding.h"
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#include "llvm/Analysis/TargetLibraryInfo.h"
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#include "llvm/Analysis/ValueTracking.h"
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#include "llvm/CodeGen/Analysis.h"
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#include "llvm/CodeGen/FastISel.h"
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#include "llvm/CodeGen/FunctionLoweringInfo.h"
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#include "llvm/CodeGen/GCMetadata.h"
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@ -578,93 +577,25 @@ static void getCopyToPartsVector(SelectionDAG &DAG, SDLoc DL,
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}
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}
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namespace {
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/// RegsForValue - This struct represents the registers (physical or virtual)
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/// that a particular set of values is assigned, and the type information
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/// about the value. The most common situation is to represent one value at a
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/// time, but struct or array values are handled element-wise as multiple
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/// values. The splitting of aggregates is performed recursively, so that we
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/// never have aggregate-typed registers. The values at this point do not
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/// necessarily have legal types, so each value may require one or more
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/// registers of some legal type.
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///
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struct RegsForValue {
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/// ValueVTs - The value types of the values, which may not be legal, and
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/// may need be promoted or synthesized from one or more registers.
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///
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SmallVector<EVT, 4> ValueVTs;
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RegsForValue::RegsForValue() {}
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/// RegVTs - The value types of the registers. This is the same size as
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/// ValueVTs and it records, for each value, what the type of the assigned
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/// register or registers are. (Individual values are never synthesized
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/// from more than one type of register.)
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///
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/// With virtual registers, the contents of RegVTs is redundant with TLI's
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/// getRegisterType member function, however when with physical registers
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/// it is necessary to have a separate record of the types.
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///
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SmallVector<MVT, 4> RegVTs;
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RegsForValue::RegsForValue(const SmallVector<unsigned, 4> ®s, MVT regvt,
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EVT valuevt)
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: ValueVTs(1, valuevt), RegVTs(1, regvt), Regs(regs) {}
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/// Regs - This list holds the registers assigned to the values.
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/// Each legal or promoted value requires one register, and each
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/// expanded value requires multiple registers.
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///
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SmallVector<unsigned, 4> Regs;
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RegsForValue::RegsForValue(LLVMContext &Context, const TargetLowering &tli,
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unsigned Reg, Type *Ty) {
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ComputeValueVTs(tli, Ty, ValueVTs);
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RegsForValue() {}
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RegsForValue(const SmallVector<unsigned, 4> ®s,
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MVT regvt, EVT valuevt)
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: ValueVTs(1, valuevt), RegVTs(1, regvt), Regs(regs) {}
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RegsForValue(LLVMContext &Context, const TargetLowering &tli,
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unsigned Reg, Type *Ty) {
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ComputeValueVTs(tli, Ty, ValueVTs);
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for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) {
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EVT ValueVT = ValueVTs[Value];
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unsigned NumRegs = tli.getNumRegisters(Context, ValueVT);
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MVT RegisterVT = tli.getRegisterType(Context, ValueVT);
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for (unsigned i = 0; i != NumRegs; ++i)
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Regs.push_back(Reg + i);
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RegVTs.push_back(RegisterVT);
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Reg += NumRegs;
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}
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}
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/// append - Add the specified values to this one.
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void append(const RegsForValue &RHS) {
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ValueVTs.append(RHS.ValueVTs.begin(), RHS.ValueVTs.end());
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RegVTs.append(RHS.RegVTs.begin(), RHS.RegVTs.end());
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Regs.append(RHS.Regs.begin(), RHS.Regs.end());
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}
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/// getCopyFromRegs - Emit a series of CopyFromReg nodes that copies from
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/// this value and returns the result as a ValueVTs value. This uses
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/// Chain/Flag as the input and updates them for the output Chain/Flag.
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/// If the Flag pointer is NULL, no flag is used.
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SDValue getCopyFromRegs(SelectionDAG &DAG, FunctionLoweringInfo &FuncInfo,
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SDLoc dl,
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SDValue &Chain, SDValue *Flag,
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const Value *V = nullptr) const;
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/// getCopyToRegs - Emit a series of CopyToReg nodes that copies the
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/// specified value into the registers specified by this object. This uses
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/// Chain/Flag as the input and updates them for the output Chain/Flag.
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/// If the Flag pointer is NULL, no flag is used.
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void
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getCopyToRegs(SDValue Val, SelectionDAG &DAG, SDLoc dl, SDValue &Chain,
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SDValue *Flag, const Value *V,
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ISD::NodeType PreferredExtendType = ISD::ANY_EXTEND) const;
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/// AddInlineAsmOperands - Add this value to the specified inlineasm node
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/// operand list. This adds the code marker, matching input operand index
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/// (if applicable), and includes the number of values added into it.
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void AddInlineAsmOperands(unsigned Kind,
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bool HasMatching, unsigned MatchingIdx, SDLoc dl,
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SelectionDAG &DAG,
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std::vector<SDValue> &Ops) const;
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};
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for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) {
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EVT ValueVT = ValueVTs[Value];
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unsigned NumRegs = tli.getNumRegisters(Context, ValueVT);
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MVT RegisterVT = tli.getRegisterType(Context, ValueVT);
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for (unsigned i = 0; i != NumRegs; ++i)
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Regs.push_back(Reg + i);
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RegVTs.push_back(RegisterVT);
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Reg += NumRegs;
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}
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}
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/// getCopyFromRegs - Emit a series of CopyFromReg nodes that copies from
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@ -17,6 +17,7 @@
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#include "StatepointLowering.h"
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#include "llvm/ADT/APInt.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/CodeGen/Analysis.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/CodeGen/SelectionDAGNodes.h"
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#include "llvm/IR/CallSite.h"
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@ -879,6 +880,79 @@ private:
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void updateDAGForMaybeTailCall(SDValue MaybeTC);
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};
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/// RegsForValue - This struct represents the registers (physical or virtual)
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/// that a particular set of values is assigned, and the type information about
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/// the value. The most common situation is to represent one value at a time,
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/// but struct or array values are handled element-wise as multiple values. The
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/// splitting of aggregates is performed recursively, so that we never have
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/// aggregate-typed registers. The values at this point do not necessarily have
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/// legal types, so each value may require one or more registers of some legal
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/// type.
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///
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struct RegsForValue {
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/// ValueVTs - The value types of the values, which may not be legal, and
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/// may need be promoted or synthesized from one or more registers.
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///
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SmallVector<EVT, 4> ValueVTs;
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/// RegVTs - The value types of the registers. This is the same size as
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/// ValueVTs and it records, for each value, what the type of the assigned
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/// register or registers are. (Individual values are never synthesized
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/// from more than one type of register.)
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///
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/// With virtual registers, the contents of RegVTs is redundant with TLI's
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/// getRegisterType member function, however when with physical registers
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/// it is necessary to have a separate record of the types.
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///
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SmallVector<MVT, 4> RegVTs;
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/// Regs - This list holds the registers assigned to the values.
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/// Each legal or promoted value requires one register, and each
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/// expanded value requires multiple registers.
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///
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SmallVector<unsigned, 4> Regs;
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RegsForValue();
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RegsForValue(const SmallVector<unsigned, 4> ®s, MVT regvt, EVT valuevt);
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RegsForValue(LLVMContext &Context, const TargetLowering &tli, unsigned Reg,
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Type *Ty);
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/// append - Add the specified values to this one.
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void append(const RegsForValue &RHS) {
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ValueVTs.append(RHS.ValueVTs.begin(), RHS.ValueVTs.end());
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RegVTs.append(RHS.RegVTs.begin(), RHS.RegVTs.end());
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Regs.append(RHS.Regs.begin(), RHS.Regs.end());
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}
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/// getCopyFromRegs - Emit a series of CopyFromReg nodes that copies from
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/// this value and returns the result as a ValueVTs value. This uses
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/// Chain/Flag as the input and updates them for the output Chain/Flag.
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/// If the Flag pointer is NULL, no flag is used.
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SDValue getCopyFromRegs(SelectionDAG &DAG, FunctionLoweringInfo &FuncInfo,
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SDLoc dl,
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SDValue &Chain, SDValue *Flag,
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const Value *V = nullptr) const;
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/// getCopyToRegs - Emit a series of CopyToReg nodes that copies the
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/// specified value into the registers specified by this object. This uses
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/// Chain/Flag as the input and updates them for the output Chain/Flag.
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/// If the Flag pointer is NULL, no flag is used.
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void
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getCopyToRegs(SDValue Val, SelectionDAG &DAG, SDLoc dl, SDValue &Chain,
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SDValue *Flag, const Value *V,
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ISD::NodeType PreferredExtendType = ISD::ANY_EXTEND) const;
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/// AddInlineAsmOperands - Add this value to the specified inlineasm node
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/// operand list. This adds the code marker, matching input operand index
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/// (if applicable), and includes the number of values added into it.
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void AddInlineAsmOperands(unsigned Kind,
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bool HasMatching, unsigned MatchingIdx, SDLoc dl,
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SelectionDAG &DAG,
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std::vector<SDValue> &Ops) const;
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};
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} // end namespace llvm
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#endif
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