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Hexagon: Remove pass that does nothing at all

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231791 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Benjamin Kramer 2015-03-10 15:06:38 +00:00
parent 71653f3324
commit 7aace59124
4 changed files with 0 additions and 106 deletions
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1
lib/Target/Hexagon/CMakeLists.txt
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@ -31,7 +31,6 @@ add_llvm_target(HexagonCodeGen
HexagonRemoveSZExtArgs.cpp
HexagonSelectionDAGInfo.cpp
HexagonSplitConst32AndConst64.cpp
HexagonSplitTFRCondSets.cpp
HexagonSubtarget.cpp
HexagonTargetMachine.cpp
HexagonTargetObjectFile.cpp

1
lib/Target/Hexagon/Hexagon.h
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@ -36,7 +36,6 @@ namespace llvm {
FunctionPass *createHexagonRemoveExtendArgs(const HexagonTargetMachine &TM);
FunctionPass *createHexagonCFGOptimizer();
FunctionPass *createHexagonSplitTFRCondSets();
FunctionPass *createHexagonSplitConst32AndConst64();
FunctionPass *createHexagonExpandPredSpillCode();
FunctionPass *createHexagonHardwareLoops();

101
lib/Target/Hexagon/HexagonSplitTFRCondSets.cpp
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@ -1,101 +0,0 @@
//===-- HexagonSplitTFRCondSets.cpp - split TFR condsets into xfers -------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//
//===----------------------------------------------------------------------===//
// This pass tries to provide opportunities for better optimization of muxes.
// The default code generated for something like: flag = (a == b) ? 1 : 3;
// would be:
//
// {p0 = cmp.eq(r0,r1)}
// {r3 = mux(p0,#1,#3)}
//
// This requires two packets. If we use .new predicated immediate transfers,
// then we can do this in a single packet, e.g.:
//
// {p0 = cmp.eq(r0,r1)
// if (p0.new) r3 = #1
// if (!p0.new) r3 = #3}
//
// Note that the conditional assignments are not generated in .new form here.
// We assume opptimisically that they will be formed later.
//
//===----------------------------------------------------------------------===//
#include "Hexagon.h"
#include "HexagonMachineFunctionInfo.h"
#include "HexagonSubtarget.h"
#include "HexagonTargetMachine.h"
#include "llvm/CodeGen/LatencyPriorityQueue.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/ScheduleHazardRecognizer.h"
#include "llvm/CodeGen/SchedulerRegistry.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetRegisterInfo.h"
using namespace llvm;
#define DEBUG_TYPE "xfer"
namespace llvm {
void initializeHexagonSplitTFRCondSetsPass(PassRegistry&);
}
namespace {
class HexagonSplitTFRCondSets : public MachineFunctionPass {
public:
static char ID;
HexagonSplitTFRCondSets() : MachineFunctionPass(ID) {
initializeHexagonSplitTFRCondSetsPass(*PassRegistry::getPassRegistry());
}
const char *getPassName() const override {
return "Hexagon Split TFRCondSets";
}
bool runOnMachineFunction(MachineFunction &Fn) override;
};
char HexagonSplitTFRCondSets::ID = 0;
bool HexagonSplitTFRCondSets::runOnMachineFunction(MachineFunction &Fn) {
return true;
}
}
//===----------------------------------------------------------------------===//
// Public Constructor Functions
//===----------------------------------------------------------------------===//
static void initializePassOnce(PassRegistry &Registry) {
const char *Name = "Hexagon Split TFRCondSets";
PassInfo *PI = new PassInfo(Name, "hexagon-split-tfr",
&HexagonSplitTFRCondSets::ID, nullptr, false,
false);
Registry.registerPass(*PI, true);
}
void llvm::initializeHexagonSplitTFRCondSetsPass(PassRegistry &Registry) {
CALL_ONCE_INITIALIZATION(initializePassOnce)
}
FunctionPass *llvm::createHexagonSplitTFRCondSets() {
return new HexagonSplitTFRCondSets();
}

3
lib/Target/Hexagon/HexagonTargetMachine.cpp
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@ -159,9 +159,6 @@ void HexagonPassConfig::addPreEmitPass() {
// Expand Spill code for predicate registers.
addPass(createHexagonExpandPredSpillCode(), false);
// Split up TFRcondsets into conditional transfers.
addPass(createHexagonSplitTFRCondSets(), false);
// Create Packets.
if (!NoOpt) {
if (!DisableHardwareLoops)