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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-25 00:33:15 +00:00
Whitespace fixes. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58539 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -85,14 +85,14 @@ class SDTypeProfile<int numresults, int numoperands,
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}
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}
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// Builtin profiles.
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// Builtin profiles.
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def SDTIntLeaf: SDTypeProfile<1, 0, [SDTCisInt<0>]>; // for 'imm'.
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def SDTIntLeaf: SDTypeProfile<1, 0, [SDTCisInt<0>]>; // for 'imm'.
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def SDTFPLeaf : SDTypeProfile<1, 0, [SDTCisFP<0>]>; // for 'fpimm'.
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def SDTFPLeaf : SDTypeProfile<1, 0, [SDTCisFP<0>]>; // for 'fpimm'.
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def SDTPtrLeaf: SDTypeProfile<1, 0, [SDTCisPtrTy<0>]>; // for '&g'.
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def SDTPtrLeaf: SDTypeProfile<1, 0, [SDTCisPtrTy<0>]>; // for '&g'.
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def SDTOther : SDTypeProfile<1, 0, [SDTCisVT<0, OtherVT>]>; // for 'vt'.
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def SDTOther : SDTypeProfile<1, 0, [SDTCisVT<0, OtherVT>]>; // for 'vt'.
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def SDTUNDEF : SDTypeProfile<1, 0, []>; // for 'undef'.
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def SDTUNDEF : SDTypeProfile<1, 0, []>; // for 'undef'.
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def SDTUnaryOp : SDTypeProfile<1, 1, []>; // bitconvert
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def SDTUnaryOp : SDTypeProfile<1, 1, []>; // for bitconvert.
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def SDTIntBinOp : SDTypeProfile<1, 2, [ // add, and, or, xor, udiv, etc.
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def SDTIntBinOp : SDTypeProfile<1, 2, [ // add, and, or, xor, udiv, etc.
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SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisInt<0>
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SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisInt<0>
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]>;
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]>;
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def SDTIntShiftOp : SDTypeProfile<1, 2, [ // shl, sra, srl
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def SDTIntShiftOp : SDTypeProfile<1, 2, [ // shl, sra, srl
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@ -101,10 +101,10 @@ def SDTIntShiftOp : SDTypeProfile<1, 2, [ // shl, sra, srl
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def SDTFPBinOp : SDTypeProfile<1, 2, [ // fadd, fmul, etc.
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def SDTFPBinOp : SDTypeProfile<1, 2, [ // fadd, fmul, etc.
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SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisFP<0>
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SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisFP<0>
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]>;
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]>;
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def SDTFPSignOp : SDTypeProfile<1, 2, [ // fcopysign.
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def SDTFPSignOp : SDTypeProfile<1, 2, [ // fcopysign.
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SDTCisSameAs<0, 1>, SDTCisFP<0>, SDTCisFP<2>
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SDTCisSameAs<0, 1>, SDTCisFP<0>, SDTCisFP<2>
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]>;
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]>;
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def SDTFPTernaryOp : SDTypeProfile<1, 3, [ // fmadd, fnmsub, etc.
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def SDTFPTernaryOp : SDTypeProfile<1, 3, [ // fmadd, fnmsub, etc.
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SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisSameAs<0, 3>, SDTCisFP<0>
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SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisSameAs<0, 3>, SDTCisFP<0>
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]>;
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]>;
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def SDTIntUnaryOp : SDTypeProfile<1, 1, [ // ctlz
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def SDTIntUnaryOp : SDTypeProfile<1, 1, [ // ctlz
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@ -122,74 +122,74 @@ def SDTFPUnaryOp : SDTypeProfile<1, 1, [ // fneg, fsqrt, etc
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def SDTFPRoundOp : SDTypeProfile<1, 1, [ // fround
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def SDTFPRoundOp : SDTypeProfile<1, 1, [ // fround
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SDTCisFP<0>, SDTCisFP<1>, SDTCisOpSmallerThanOp<0, 1>
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SDTCisFP<0>, SDTCisFP<1>, SDTCisOpSmallerThanOp<0, 1>
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]>;
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]>;
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def SDTFPExtendOp : SDTypeProfile<1, 1, [ // fextend
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def SDTFPExtendOp : SDTypeProfile<1, 1, [ // fextend
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SDTCisFP<0>, SDTCisFP<1>, SDTCisOpSmallerThanOp<1, 0>
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SDTCisFP<0>, SDTCisFP<1>, SDTCisOpSmallerThanOp<1, 0>
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]>;
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]>;
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def SDTIntToFPOp : SDTypeProfile<1, 1, [ // [su]int_to_fp
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def SDTIntToFPOp : SDTypeProfile<1, 1, [ // [su]int_to_fp
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SDTCisFP<0>, SDTCisInt<1>
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SDTCisFP<0>, SDTCisInt<1>
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]>;
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]>;
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def SDTFPToIntOp : SDTypeProfile<1, 1, [ // fp_to_[su]int
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def SDTFPToIntOp : SDTypeProfile<1, 1, [ // fp_to_[su]int
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SDTCisInt<0>, SDTCisFP<1>
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SDTCisInt<0>, SDTCisFP<1>
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]>;
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]>;
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def SDTExtInreg : SDTypeProfile<1, 2, [ // sext_inreg
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def SDTExtInreg : SDTypeProfile<1, 2, [ // sext_inreg
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SDTCisSameAs<0, 1>, SDTCisInt<0>, SDTCisVT<2, OtherVT>,
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SDTCisSameAs<0, 1>, SDTCisInt<0>, SDTCisVT<2, OtherVT>,
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SDTCisVTSmallerThanOp<2, 1>
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SDTCisVTSmallerThanOp<2, 1>
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]>;
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]>;
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def SDTSetCC : SDTypeProfile<1, 3, [ // setcc
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def SDTSetCC : SDTypeProfile<1, 3, [ // setcc
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SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT>
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SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT>
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]>;
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]>;
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def SDTSelect : SDTypeProfile<1, 3, [ // select
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def SDTSelect : SDTypeProfile<1, 3, [ // select
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SDTCisInt<1>, SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>
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SDTCisInt<1>, SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>
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]>;
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]>;
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def SDTSelectCC : SDTypeProfile<1, 5, [ // select_cc
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def SDTSelectCC : SDTypeProfile<1, 5, [ // select_cc
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SDTCisSameAs<1, 2>, SDTCisSameAs<3, 4>, SDTCisSameAs<0, 3>,
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SDTCisSameAs<1, 2>, SDTCisSameAs<3, 4>, SDTCisSameAs<0, 3>,
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SDTCisVT<5, OtherVT>
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SDTCisVT<5, OtherVT>
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]>;
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]>;
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def SDTBr : SDTypeProfile<0, 1, [ // br
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def SDTBr : SDTypeProfile<0, 1, [ // br
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SDTCisVT<0, OtherVT>
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SDTCisVT<0, OtherVT>
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]>;
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]>;
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def SDTBrcond : SDTypeProfile<0, 2, [ // brcond
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def SDTBrcond : SDTypeProfile<0, 2, [ // brcond
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SDTCisInt<0>, SDTCisVT<1, OtherVT>
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SDTCisInt<0>, SDTCisVT<1, OtherVT>
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]>;
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]>;
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def SDTBrind : SDTypeProfile<0, 1, [ // brind
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def SDTBrind : SDTypeProfile<0, 1, [ // brind
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SDTCisPtrTy<0>
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SDTCisPtrTy<0>
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]>;
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]>;
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def SDTNone : SDTypeProfile<0, 0, []>; // ret, trap
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def SDTNone : SDTypeProfile<0, 0, []>; // ret, trap
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def SDTLoad : SDTypeProfile<1, 1, [ // load
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def SDTLoad : SDTypeProfile<1, 1, [ // load
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SDTCisPtrTy<1>
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SDTCisPtrTy<1>
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]>;
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]>;
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def SDTStore : SDTypeProfile<0, 2, [ // store
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def SDTStore : SDTypeProfile<0, 2, [ // store
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SDTCisPtrTy<1>
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SDTCisPtrTy<1>
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]>;
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]>;
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def SDTIStore : SDTypeProfile<1, 3, [ // indexed store
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def SDTIStore : SDTypeProfile<1, 3, [ // indexed store
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SDTCisSameAs<0, 2>, SDTCisPtrTy<0>, SDTCisPtrTy<3>
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SDTCisSameAs<0, 2>, SDTCisPtrTy<0>, SDTCisPtrTy<3>
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]>;
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]>;
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def SDTVecShuffle : SDTypeProfile<1, 3, [
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def SDTVecShuffle : SDTypeProfile<1, 3, [
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SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>, SDTCisIntVectorOfSameSize<3, 0>
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SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>, SDTCisIntVectorOfSameSize<3, 0>
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]>;
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]>;
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def SDTVecExtract : SDTypeProfile<1, 2, [ // vector extract
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def SDTVecExtract : SDTypeProfile<1, 2, [ // vector extract
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SDTCisEltOfVec<0, 1>, SDTCisPtrTy<2>
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SDTCisEltOfVec<0, 1>, SDTCisPtrTy<2>
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]>;
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]>;
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def SDTVecInsert : SDTypeProfile<1, 3, [ // vector insert
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def SDTVecInsert : SDTypeProfile<1, 3, [ // vector insert
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SDTCisEltOfVec<2, 1>, SDTCisSameAs<0, 1>, SDTCisPtrTy<3>
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SDTCisEltOfVec<2, 1>, SDTCisSameAs<0, 1>, SDTCisPtrTy<3>
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]>;
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]>;
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def STDPrefetch : SDTypeProfile<0, 3, [ // prefetch
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def STDPrefetch : SDTypeProfile<0, 3, [ // prefetch
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SDTCisPtrTy<0>, SDTCisSameAs<1, 2>, SDTCisInt<1>
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SDTCisPtrTy<0>, SDTCisSameAs<1, 2>, SDTCisInt<1>
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]>;
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]>;
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def STDMemBarrier : SDTypeProfile<0, 5, [ // memory barier
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def STDMemBarrier : SDTypeProfile<0, 5, [ // memory barier
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SDTCisSameAs<0,1>, SDTCisSameAs<0,2>, SDTCisSameAs<0,3>, SDTCisSameAs<0,4>,
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SDTCisSameAs<0,1>, SDTCisSameAs<0,2>, SDTCisSameAs<0,3>, SDTCisSameAs<0,4>,
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SDTCisInt<0>
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SDTCisInt<0>
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]>;
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]>;
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@ -240,7 +240,7 @@ def node;
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def srcvalue;
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def srcvalue;
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def imm : SDNode<"ISD::Constant" , SDTIntLeaf , [], "ConstantSDNode">;
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def imm : SDNode<"ISD::Constant" , SDTIntLeaf , [], "ConstantSDNode">;
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def timm : SDNode<"ISD::TargetConstant", SDTIntLeaf , [], "ConstantSDNode">;
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def timm : SDNode<"ISD::TargetConstant",SDTIntLeaf, [], "ConstantSDNode">;
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def fpimm : SDNode<"ISD::ConstantFP", SDTFPLeaf , [], "ConstantFPSDNode">;
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def fpimm : SDNode<"ISD::ConstantFP", SDTFPLeaf , [], "ConstantFPSDNode">;
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def vt : SDNode<"ISD::VALUETYPE" , SDTOther , [], "VTSDNode">;
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def vt : SDNode<"ISD::VALUETYPE" , SDTOther , [], "VTSDNode">;
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def bb : SDNode<"ISD::BasicBlock", SDTOther , [], "BasicBlockSDNode">;
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def bb : SDNode<"ISD::BasicBlock", SDTOther , [], "BasicBlockSDNode">;
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