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generalize 'CaseBlock'. It really allows any comparison to be inserted.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31161 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-10-24 17:03:35 +00:00
parent 578e64a041
commit 7b248d9866
2 changed files with 9 additions and 11 deletions
include/llvm/CodeGen
SelectionDAGISel.h
lib/CodeGen/SelectionDAG
SelectionDAGISel.cpp

15
include/llvm/CodeGen/SelectionDAGISel.h

@ -82,20 +82,19 @@ public:
/// SDISel for the code generation of additional basic blocks needed by multi-
/// case switch statements.
struct CaseBlock {
CaseBlock(ISD::CondCode cc, Value *s, Constant *c, MachineBasicBlock *lhs,
MachineBasicBlock *rhs, MachineBasicBlock *me) :
CC(cc), SwitchV(s), CaseC(c), LHSBB(lhs), RHSBB(rhs), ThisBB(me) {}
CaseBlock(ISD::CondCode cc, Value *cmplhs, Value *cmprhs,
MachineBasicBlock *lhs, MachineBasicBlock *rhs,
MachineBasicBlock *me) :
CC(cc), CmpLHS(cmplhs), CmpRHS(cmprhs), LHSBB(lhs), RHSBB(rhs), ThisBB(me){}
// CC - the condition code to use for the case block's setcc node
ISD::CondCode CC;
// SwitchV - the value to be switched on, 'foo' in switch(foo)
Value *SwitchV;
// CaseC - the constant the setcc node will compare against SwitchV
Constant *CaseC;
// CmpLHS/CmpRHS - The LHS/RHS of the comparison to emit.
Value *CmpLHS, *CmpRHS;
// LHSBB - the block to branch to if the setcc is true
MachineBasicBlock *LHSBB;
// RHSBB - the block to branch to if the setcc is false
MachineBasicBlock *RHSBB;
// ThisBB - the blcok into which to emit the code for the setcc and branches
// ThisBB - the block into which to emit the code for the setcc and branches
MachineBasicBlock *ThisBB;
};
struct JumpTable {

5
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

@ -819,9 +819,8 @@ void SelectionDAGLowering::visitBr(BranchInst &I) {
/// visitSwitchCase - Emits the necessary code to represent a single node in
/// the binary search tree resulting from lowering a switch instruction.
void SelectionDAGLowering::visitSwitchCase(SelectionDAGISel::CaseBlock &CB) {
SDOperand SwitchOp = getValue(CB.SwitchV);
SDOperand CaseOp = getValue(CB.CaseC);
SDOperand Cond = DAG.getSetCC(MVT::i1, SwitchOp, CaseOp, CB.CC);
SDOperand Cond = DAG.getSetCC(MVT::i1, getValue(CB.CmpLHS),
getValue(CB.CmpRHS), CB.CC);
// Set NextBlock to be the MBB immediately after the current one, if any.
// This is used to avoid emitting unnecessary branches to the next block.