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Fix SimplifySelectCC to add newly created nodes to the DAGCombiner

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worklist, as it may be possible to perform further optimization on them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140349 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2011-09-22 23:01:29 +00:00
parent 4bd89873be
commit 7b316c9327
2 changed files with 9 additions and 6 deletions
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3
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
View File

@ -7500,10 +7500,13 @@ SDValue DAGCombiner::SimplifySelectCC(DebugLoc DL, SDValue N0, SDValue N1,
SDValue Cond = DAG.getSetCC(DL,
TLI.getSetCCResultType(N0.getValueType()),
N0, N1, CC);
AddToWorkList(Cond.getNode());
SDValue CstOffset = DAG.getNode(ISD::SELECT, DL, Zero.getValueType(),
Cond, One, Zero);
AddToWorkList(CstOffset.getNode());
CPIdx = DAG.getNode(ISD::ADD, DL, TLI.getPointerTy(), CPIdx,
CstOffset);
AddToWorkList(CPIdx.getNode());
return DAG.getLoad(TV->getValueType(0), DL, DAG.getEntryNode(), CPIdx,
MachinePointerInfo::getConstantPool(), false,
false, Alignment);

12
test/CodeGen/ARM/select.ll
View File

@ -76,12 +76,12 @@ define double @f7(double %a, double %b) {
; block generated, odds are good that we have close to the ideal code for this:
;
; CHECK-NEON: _f8:
; CHECK-NEON: movw [[REGISTER_1:r[0-9]+]], #1123
; CHECK-NEON-NEXT: movs [[REGISTER_2:r[0-9]+]], #0
; CHECK-NEON-NEXT: cmp r0, [[REGISTER_1]]
; CHECK-NEON-NEXT: it eq
; CHECK-NEON-NEXT: moveq [[REGISTER_2]], #4
; CHECK-NEON-NEXT: adr [[REGISTER_3:r[0-9]+]], LCPI
; CHECK-NEON: adr r2, LCPI7_0
; CHECK-NEON-NEXT: movw r3, #1123
; CHECK-NEON-NEXT: adds r1, r2, #4
; CHECK-NEON-NEXT: cmp r0, r3
; CHECK-NEON-NEXT: it ne
; CHECK-NEON-NEXT: movne r1, r2
; CHECK-NEON-NEXT: ldr
; CHECK-NEON: bx