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Report error if codegen tries to instantiate a ARM target when the cpu does support it. e.g. cortex-m* processors.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110798 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2010-08-11 07:17:46 +00:00
parent 8d62e713ea
commit 7b4d31176e
6 changed files with 15 additions and 13 deletions
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7
lib/Target/ARM/ARM.td
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@@ -28,6 +28,8 @@ def FeatureNEON : SubtargetFeature<"neon", "ARMFPUType", "NEON",
"Enable NEON instructions">;
def FeatureThumb2 : SubtargetFeature<"thumb2", "ThumbMode", "Thumb2",
"Enable Thumb2 instructions">;
def FeatureNoARM : SubtargetFeature<"noarm", "NoARM", "true",
"Does not support ARM mode execution">;
def FeatureFP16 : SubtargetFeature<"fp16", "HasFP16", "true",
"Enable half-precision floating point">;
def FeatureHWDiv : SubtargetFeature<"hwdiv", "HasHardwareDivide", "true",
@@ -69,7 +71,7 @@ def ArchV6 : SubtargetFeature<"v6", "ARMArchVersion", "V6",
"ARM v6">;
def ArchV6M : SubtargetFeature<"v6m", "ARMArchVersion", "V6M",
"ARM v6m",
[FeatureDB]>;
[FeatureNoARM, FeatureDB]>;
def ArchV6T2 : SubtargetFeature<"v6t2", "ARMArchVersion", "V6T2",
"ARM v6t2",
[FeatureThumb2]>;
@@ -78,7 +80,8 @@ def ArchV7A : SubtargetFeature<"v7a", "ARMArchVersion", "V7A",
[FeatureThumb2, FeatureNEON, FeatureDB]>;
def ArchV7M : SubtargetFeature<"v7m", "ARMArchVersion", "V7M",
"ARM v7M",
[FeatureThumb2, FeatureDB, FeatureHWDiv]>;
[FeatureThumb2, FeatureNoARM, FeatureDB,
FeatureHWDiv]>;
//===----------------------------------------------------------------------===//
// ARM Processors supported.

1
lib/Target/ARM/ARMSubtarget.cpp
View File

@@ -36,6 +36,7 @@ ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &FS,
, SlowFPBrcc(false)
, IsThumb(isT)
, ThumbMode(Thumb1)
, NoARM(false)
, PostRAScheduler(false)
, IsR9Reserved(ReserveR9)
, UseMovt(UseMOVT)

5
lib/Target/ARM/ARMSubtarget.h
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@@ -63,6 +63,9 @@ protected:
/// ThumbMode - Indicates supported Thumb version.
ThumbTypeEnum ThumbMode;
/// NoARM - True if subtarget does not support ARM mode execution.
bool NoARM;
/// PostRAScheduler - True if using post-register-allocation scheduler.
bool PostRAScheduler;
@@ -136,6 +139,8 @@ protected:
bool hasV6T2Ops() const { return ARMArchVersion >= V6T2; }
bool hasV7Ops() const { return ARMArchVersion >= V7A; }
bool hasARMOps() const { return !NoARM; }
bool hasVFP2() const { return ARMFPUType >= VFPv2; }
bool hasVFP3() const { return ARMFPUType >= VFPv3; }
bool hasNEON() const { return ARMFPUType >= NEON; }

3
lib/Target/ARM/ARMTargetMachine.cpp
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@@ -65,6 +65,9 @@ ARMTargetMachine::ARMTargetMachine(const Target &T, const std::string &TT,
"v128:64:128-v64:64:64-n32")),
TLInfo(*this),
TSInfo(*this) {
if (!Subtarget.hasARMOps())
report_fatal_error("CPU: '" + Subtarget.getCPUString() + "' does not "
"support ARM mode execution!");
}
ThumbTargetMachine::ThumbTargetMachine(const Target &T, const std::string &TT,