6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-15 23:31:37 +00:00
Code Issues Projects Releases Wiki Activity

Add a new form of MCOperand, for representing sub-instructions. This is intended for supporting bundles through the MC layer, rather than lowering them pre-MC as we currently do for Thumb2 IT blocks. Since these sub-instruction operands hold pointers to the sub-instructions, it is the responsibility of the target's AsmPrinter to provide storage for them for the duration of the EmitInstruction() call.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148492 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Owen Anderson 2012-01-19 19:24:37 +00:00
parent 0cdece4389
commit 7b672fe03b
1 changed files with 20 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
include/llvm/MC/MCInst.h
View File

@ -25,6 +25,7 @@ class raw_ostream;
class MCAsmInfo; class MCAsmInfo;
class MCInstPrinter; class MCInstPrinter;
class MCExpr; class MCExpr;
class MCInst;
/// MCOperand - Instances of this class represent operands of the MCInst class. /// MCOperand - Instances of this class represent operands of the MCInst class.
/// This is a simple discriminated union. /// This is a simple discriminated union.
@ -34,7 +35,8 @@ class MCOperand {
kRegister, ///< Register operand. kRegister, ///< Register operand.
kImmediate, ///< Immediate operand. kImmediate, ///< Immediate operand.
kFPImmediate, ///< Floating-point immediate operand. kFPImmediate, ///< Floating-point immediate operand.
kExpr ///< Relocatable immediate operand. kExpr, ///< Relocatable immediate operand.
kInst ///< Sub-instruction operand.
}; };
unsigned char Kind; unsigned char Kind;
@ -43,6 +45,7 @@ class MCOperand {
int64_t ImmVal; int64_t ImmVal;
double FPImmVal; double FPImmVal;
const MCExpr *ExprVal; const MCExpr *ExprVal;
const MCInst *InstVal;
}; };
public: public:
@ -53,6 +56,7 @@ public:
bool isImm() const { return Kind == kImmediate; } bool isImm() const { return Kind == kImmediate; }
bool isFPImm() const { return Kind == kFPImmediate; } bool isFPImm() const { return Kind == kFPImmediate; }
bool isExpr() const { return Kind == kExpr; } bool isExpr() const { return Kind == kExpr; }
bool isInst() const { return Kind == kInst; }
/// getReg - Returns the register number. /// getReg - Returns the register number.
unsigned getReg() const { unsigned getReg() const {
@ -94,6 +98,15 @@ public:
ExprVal = Val; ExprVal = Val;
} }
const MCInst *getInst() const {
assert(isInst() && "This is not a sub-instruction");
return InstVal;
}
void setInst(const MCInst *Val) {
assert(isInst() && "This is not a sub-instruction");
InstVal = Val;
}
static MCOperand CreateReg(unsigned Reg) { static MCOperand CreateReg(unsigned Reg) {
MCOperand Op; MCOperand Op;
Op.Kind = kRegister; Op.Kind = kRegister;
@ -118,6 +131,12 @@ public:
Op.ExprVal = Val; Op.ExprVal = Val;
return Op; return Op;
} }
static MCOperand CreateInst(const MCInst *Val) {
MCOperand Op;
Op.Kind = kInst;
Op.InstVal = Val;
return Op;
}
void print(raw_ostream &OS, const MCAsmInfo *MAI) const; void print(raw_ostream &OS, const MCAsmInfo *MAI) const;
void dump() const; void dump() const;