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[CodeGenPrepare] Handle properly the promotion of operands when this does not

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generate instructions.

Fixes PR21978.
Related to <rdar://problem/18310086>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224717 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Quentin Colombet 2014-12-22 18:11:52 +00:00
parent c1aa521fb4
commit 7b88565334
2 changed files with 32 additions and 3 deletions
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10
lib/CodeGen/CodeGenPrepare.cpp
View File

@ -2069,9 +2069,13 @@ Value *TypePromotionHelper::promoteOperandForOther(
if (!ExtForOpnd) { if (!ExtForOpnd) {
// If yes, create a new one. // If yes, create a new one.
DEBUG(dbgs() << "More operands to ext\n"); DEBUG(dbgs() << "More operands to ext\n");
ExtForOpnd = Value *ValForExtOpnd = IsSExt ? TPT.createSExt(Ext, Opnd, Ext->getType())
cast<Instruction>(IsSExt ? TPT.createSExt(Ext, Opnd, Ext->getType()) : TPT.createZExt(Ext, Opnd, Ext->getType());
: TPT.createZExt(Ext, Opnd, Ext->getType())); if (!isa<Instruction>(ValForExtOpnd)) {
TPT.setOperand(ExtOpnd, OpIdx, ValForExtOpnd);
continue;
}
ExtForOpnd = cast<Instruction>(ValForExtOpnd);
++CreatedInsts; ++CreatedInsts;
} }
if (Exts) if (Exts)

25
test/CodeGen/X86/codegen-prepare-extload.ll
View File

@ -336,3 +336,28 @@ entry:
%b = zext <2 x i32> %a to <2 x i64> %b = zext <2 x i32> %a to <2 x i64>
ret void ret void
} }
@a = common global i32 0, align 4
@c = common global [2 x i32] zeroinitializer, align 4
; PR21978.
; Make sure we support promotion of operands that produces a Value as opposed
; to an instruction.
; This used to cause a crash.
; OPTALL-LABEL: @promotionOfArgEndsUpInValue
; OPTALL: [[LD:%[a-zA-Z_0-9-]+]] = load i16* %addr
; OPT-NEXT: [[SEXT:%[a-zA-Z_0-9-]+]] = sext i16 [[LD]] to i32
; OPT-NEXT: [[RES:%[a-zA-Z_0-9-]+]] = add nuw nsw i32 [[SEXT]], zext (i1 icmp ne (i32* getelementptr inbounds ([2 x i32]* @c, i64 0, i64 1), i32* @a) to i32)
;
; DISABLE-NEXT: [[ADD:%[a-zA-Z_0-9-]+]] = add nuw nsw i16 [[LD]], zext (i1 icmp ne (i32* getelementptr inbounds ([2 x i32]* @c, i64 0, i64 1), i32* @a) to i16)
; DISABLE-NEXT: [[RES:%[a-zA-Z_0-9-]+]] = sext i16 [[ADD]] to i32
;
; OPTALL-NEXT: ret i32 [[RES]]
define i32 @promotionOfArgEndsUpInValue(i16* %addr) {
entry:
%val = load i16* %addr
%add = add nuw nsw i16 %val, zext (i1 icmp ne (i32* getelementptr inbounds ([2 x i32]* @c, i64 0, i64 1), i32* @a) to i16)
%conv3 = sext i16 %add to i32
ret i32 %conv3
}