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[X86][Haswell][SchedModel] Add architecture specific scheduling models.

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Group: Integer MMX and XMM instructions.
Sub-group: Other instructions.

<rdar://problem/15607571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215917 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Quentin Colombet
2014-08-18 17:55:43 +00:00
parent 0c5071f561
commit 7bdfd1b443
1 changed files with 9 additions and 0 deletions
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9
lib/Target/X86/X86SchedHaswell.td
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@@ -1536,4 +1536,13 @@ def : InstRW<[WritePShift], (instregex "(V?)PS(LL|RL|RA)(W|D|Q)(Y?)rr")>;
// PSLL,PSRL DQ. // PSLL,PSRL DQ.
def : InstRW<[WriteP5], (instregex "(V?)PS(R|L)LDQ(Y?)ri")>; def : InstRW<[WriteP5], (instregex "(V?)PS(R|L)LDQ(Y?)ri")>;
//-- Other --//
// EMMS.
def WriteEMMS : SchedWriteRes<[]> {
let Latency = 13;
let NumMicroOps = 31;
}
def : InstRW<[WriteEMMS], (instregex "MMX_EMMS")>;
} // SchedModel } // SchedModel