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TableGen'd RegPressure: Added getPressureSetName.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155234 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -151,6 +151,17 @@ EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank,
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<< "unsigned " << ClassName << "::getNumRegPressureSets() const {\n"
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<< " return " << NumSets << ";\n}\n\n";
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OS << "// Get the name of this register unit pressure set.\n"
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<< "const char *" << ClassName << "::\n"
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<< "getRegPressureSetName(unsigned Idx) const {\n"
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<< " static const char *PressureNameTable[] = {\n";
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for (unsigned i = 0; i < NumSets; ++i ) {
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OS << " \"" << RegBank.getRegPressureSet(i).Name << "\",\n";
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}
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OS << " 0 };\n"
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<< " return PressureNameTable[Idx];\n"
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<< "}\n\n";
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OS << "// Get the register unit pressure limit for this dimension.\n"
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<< "// This limit must be adjusted dynamically for reserved registers.\n"
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<< "unsigned " << ClassName << "::\n"
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@ -159,7 +170,7 @@ EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank,
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for (unsigned i = 0; i < NumSets; ++i ) {
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const RegUnitSet &RegUnits = RegBank.getRegPressureSet(i);
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OS << " " << RegBank.getRegUnitSetWeight(RegUnits.Units)
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<< ", \t// " << i << ": " << RegBank.getRegPressureSet(i).Name << "\n";
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<< ", \t// " << i << ": " << RegUnits.Name << "\n";
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}
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OS << " 0 };\n"
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<< " return PressureLimitTable[Idx];\n"
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@ -671,6 +682,7 @@ RegisterInfoEmitter::runTargetHeader(raw_ostream &OS, CodeGenTarget &Target,
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<< " const RegClassWeight &getRegClassWeight("
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<< "const TargetRegisterClass *RC) const;\n"
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<< " unsigned getNumRegPressureSets() const;\n"
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<< " const char *getRegPressureSetName(unsigned Idx) const;\n"
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<< " unsigned getRegPressureSetLimit(unsigned Idx) const;\n"
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<< " const int *getRegClassPressureSets("
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<< "const TargetRegisterClass *RC) const;\n"
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