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implement rdar://8456378 and PR7557 - support for the fstsw,

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an instruction that requires a WHOLE NEW wonderful kind of alias.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115015 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2010-09-29 01:50:45 +00:00
parent 7036f8be4d
commit 7c51a3172c
4 changed files with 27 additions and 8 deletions
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21
lib/Target/X86/AsmParser/X86AsmParser.cpp
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@@ -52,7 +52,7 @@ private:
bool ParseDirectiveWord(unsigned Size, SMLoc L);
bool MatchAndEmitInstruction(SMLoc IDLoc,
const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out);
/// @name Auto-generated Matcher Functions
@@ -1109,10 +1109,24 @@ bool X86ATTAsmParser::ParseDirectiveWord(unsigned Size, SMLoc L) {
bool X86ATTAsmParser::
MatchAndEmitInstruction(SMLoc IDLoc,
const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out) {
assert(!Operands.empty() && "Unexpect empty operand list!");
X86Operand *Op = static_cast<X86Operand*>(Operands[0]);
assert(Op->isToken() && "Leading operand should always be a mnemonic!");
// First, handle aliases that expand to multiple instructions.
// FIXME: This should be replaced with a real .td file alias mechanism.
if (Op->getToken() == "fstsw") {
MCInst Inst;
Inst.setOpcode(X86::WAIT);
Out.EmitInstruction(Inst);
delete Operands[0];
Operands[0] = X86Operand::CreateToken("fnstsw", IDLoc);
}
bool WasOriginallyInvalidOperand = false;
unsigned OrigErrorInfo;
MCInst Inst;
@@ -1136,9 +1150,6 @@ MatchAndEmitInstruction(SMLoc IDLoc,
// valid prefixes, and we could just infer the right unambiguous
// type. However, that requires substantially more matcher support than the
// following hack.
X86Operand *Op = static_cast<X86Operand*>(Operands[0]);
assert(Op->isToken() && "Leading operand should always be a mnemonic!");
// Change the operand to point to a temporary token.
StringRef Base = Op->getToken();