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fix a couple of typos

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171508 91177308-0d34-0410-b5e6-96231b3b80d8
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Eli Bendersky 2013-01-04 19:09:15 +00:00
parent da704cc1e7
commit 7c88270ae2
1 changed files with 2 additions and 2 deletions
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docs/TableGenFundamentals.rst
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@ -121,11 +121,11 @@ this (at the time of this writing):
...
This definition corresponds to the 32-bit register-register ``add`` instruction
of the the x86 architecture. ``def ADD32rr`` defines a record named
of the x86 architecture. ``def ADD32rr`` defines a record named
``ADD32rr``, and the comment at the end of the line indicates the superclasses
of the definition. The body of the record contains all of the data that
TableGen assembled for the record, indicating that the instruction is part of
the "X86" namespace, the pattern indicating how the the instruction should be
the "X86" namespace, the pattern indicating how the instruction should be
emitted into the assembly file, that it is a two-address instruction, has a
particular encoding, etc. The contents and semantics of the information in the
record are specific to the needs of the X86 backend, and are only shown as an