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Minor reformatting, & protection fixes

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@570 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2001-09-14 16:08:06 +00:00
parent c7634618ca
commit 7c94f9dc96
2 changed files with 55 additions and 58 deletions
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22
include/llvm/Target/InstInfo.h
View File

@ -19,6 +19,9 @@ typedef int InstrSchedClass;
// The actual object needs to be created separately for each target machine.
// This variable is initialized and reset by class MachineInstrInfo.
//
// FIXME: This should be a property of the target so that more than one target
// at a time can be active...
//
extern const MachineInstrDescriptor *TargetInstrDescriptors;
@ -70,18 +73,12 @@ protected:
unsigned int numRealOpCodes; // number of non-dummy op codes
public:
/*ctor*/ MachineInstrInfo(const MachineInstrDescriptor* _desc,
unsigned int _descSize,
unsigned int _numRealOpCodes);
/*dtor*/ virtual ~MachineInstrInfo();
MachineInstrInfo(const MachineInstrDescriptor *desc, unsigned descSize,
unsigned numRealOpCodes);
virtual ~MachineInstrInfo();
unsigned int getNumRealOpCodes() const {
return numRealOpCodes;
}
unsigned int getNumTotalOpCodes() const {
return descSize;
}
unsigned getNumRealOpCodes() const { return numRealOpCodes; }
unsigned getNumTotalOpCodes() const { return descSize; }
const MachineInstrDescriptor& getDescriptor(MachineOpCode opCode) const {
assert(opCode >= 0 && opCode < (int)descSize);
@ -96,7 +93,7 @@ public:
return getDescriptor(opCode).resultPos;
}
unsigned int getNumDelaySlots(MachineOpCode opCode) const {
unsigned getNumDelaySlots(MachineOpCode opCode) const {
return getDescriptor(opCode).numDelaySlots;
}
@ -173,7 +170,6 @@ public:
bool isPhi(MachineOpCode opCode) { return isDummyPhiInstr(opCode); }
// Check if an instruction can be issued before its operands are ready,
// or if a subsequent instruction that uses its result can be issued
// before the results are ready.

7
include/llvm/Target/Machine.h
View File

@ -13,6 +13,7 @@
class TargetMachine;
class MachineInstrInfo;
class MachineInstrDescriptor;
//---------------------------------------------------------------------------
// Data types used to define information about a single machine instruction
@ -22,7 +23,6 @@ typedef int MachineOpCode;
typedef int OpCodeMask;
//---------------------------------------------------------------------------
// class TargetMachine
//
@ -42,8 +42,8 @@ public:
// Register information. This needs to be reorganized into a single class.
int zeroRegNum; // register that gives 0 if any (-1 if none)
public:
TargetMachine(const string &targetname,
protected:
TargetMachine(const string &targetname, // Can only create subclasses...
unsigned char PtrSize = 8, unsigned char PtrAl = 8,
unsigned char DoubleAl = 8, unsigned char FloatAl = 4,
unsigned char LongAl = 8, unsigned char IntAl = 4,
@ -51,6 +51,7 @@ public:
: TargetName(targetname), DataLayout(targetname, PtrSize, PtrAl,
DoubleAl, FloatAl, LongAl, IntAl,
ShortAl, ByteAl) { }
public:
virtual ~TargetMachine() {}
virtual const MachineInstrInfo& getInstrInfo() const = 0;