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https://github.com/c64scene-ar/llvm-6502.git
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -37,8 +37,8 @@ define void @test1(i8 %V, i32 *%P) {
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;; Simple load value numbering.
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; CHECK-LABEL: @test2(
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define i32 @test2(i32 *%P) {
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%V1 = load i32* %P
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%V2 = load i32* %P
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%V1 = load i32, i32* %P
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%V2 = load i32, i32* %P
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%Diff = sub i32 %V1, %V2
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ret i32 %Diff
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; CHECK: ret i32 0
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@@ -46,9 +46,9 @@ define i32 @test2(i32 *%P) {
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; CHECK-LABEL: @test2a(
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define i32 @test2a(i32 *%P, i1 %b) {
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%V1 = load i32* %P
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%V1 = load i32, i32* %P
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tail call void @llvm.assume(i1 %b)
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%V2 = load i32* %P
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%V2 = load i32, i32* %P
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%Diff = sub i32 %V1, %V2
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ret i32 %Diff
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; CHECK: ret i32 0
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@@ -57,13 +57,13 @@ define i32 @test2a(i32 *%P, i1 %b) {
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;; Cross block load value numbering.
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; CHECK-LABEL: @test3(
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define i32 @test3(i32 *%P, i1 %Cond) {
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%V1 = load i32* %P
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%V1 = load i32, i32* %P
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br i1 %Cond, label %T, label %F
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T:
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store i32 4, i32* %P
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ret i32 42
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F:
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%V2 = load i32* %P
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%V2 = load i32, i32* %P
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%Diff = sub i32 %V1, %V2
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ret i32 %Diff
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; CHECK: F:
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@@ -72,14 +72,14 @@ F:
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; CHECK-LABEL: @test3a(
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define i32 @test3a(i32 *%P, i1 %Cond, i1 %b) {
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%V1 = load i32* %P
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%V1 = load i32, i32* %P
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br i1 %Cond, label %T, label %F
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T:
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store i32 4, i32* %P
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ret i32 42
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F:
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tail call void @llvm.assume(i1 %b)
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%V2 = load i32* %P
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%V2 = load i32, i32* %P
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%Diff = sub i32 %V1, %V2
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ret i32 %Diff
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; CHECK: F:
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@@ -89,7 +89,7 @@ F:
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;; Cross block load value numbering stops when stores happen.
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; CHECK-LABEL: @test4(
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define i32 @test4(i32 *%P, i1 %Cond) {
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%V1 = load i32* %P
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%V1 = load i32, i32* %P
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br i1 %Cond, label %T, label %F
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T:
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ret i32 42
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@@ -97,7 +97,7 @@ F:
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; Clobbers V1
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store i32 42, i32* %P
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%V2 = load i32* %P
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%V2 = load i32, i32* %P
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%Diff = sub i32 %V1, %V2
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ret i32 %Diff
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; CHECK: F:
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@@ -120,7 +120,7 @@ define i32 @test5(i32 *%P) {
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; CHECK-LABEL: @test6(
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define i32 @test6(i32 *%P) {
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store i32 42, i32* %P
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%V1 = load i32* %P
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%V1 = load i32, i32* %P
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ret i32 %V1
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; CHECK: ret i32 42
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}
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@@ -129,7 +129,7 @@ define i32 @test6(i32 *%P) {
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define i32 @test6a(i32 *%P, i1 %b) {
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store i32 42, i32* %P
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tail call void @llvm.assume(i1 %b)
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%V1 = load i32* %P
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%V1 = load i32, i32* %P
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ret i32 %V1
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; CHECK: ret i32 42
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}
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@@ -195,11 +195,11 @@ define void @test11(i32 *%P) {
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; CHECK-LABEL: @test12(
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define i32 @test12(i1 %B, i32* %P1, i32* %P2) {
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%load0 = load i32* %P1
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%1 = load atomic i32* %P2 seq_cst, align 4
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%load1 = load i32* %P1
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%load0 = load i32, i32* %P1
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%1 = load atomic i32, i32* %P2 seq_cst, align 4
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%load1 = load i32, i32* %P1
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%sel = select i1 %B, i32 %load0, i32 %load1
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ret i32 %sel
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; CHECK: load i32* %P1
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; CHECK: load i32* %P1
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; CHECK: load i32, i32* %P1
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; CHECK: load i32, i32* %P1
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}
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