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Remove no-longer-correct special case for disasm of ARM BL instructions.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127517 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-03-12 01:05:29 +00:00
parent 34e98e968f
commit 7d3a16a6f8
1 changed files with 0 additions and 5 deletions
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5
utils/TableGen/ARMDecoderEmitter.cpp
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@ -1592,11 +1592,6 @@ ARMDEBackend::populateInstruction(const CodeGenInstruction &CGI,
// better off using the generic RSCri and RSCrs instructions.
if (Name == "RSCSri" || Name == "RSCSrs") return false;
// Ignore the non-Darwin BL instructions and the TPsoft (TLS) instruction.
if (Name == "BL" || Name == "BL_pred" || Name == "BLX" ||
Name == "BLX_pred" || Name == "TPsoft")
return false;
// A8-598: VEXT
// Vector Extract extracts elements from the bottom end of the second
// operand vector and the top end of the first, concatenates them and