mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-04-07 01:38:26 +00:00
Add a separate list of fixed intervals. This improves the running time
of the register allocator as follows:
before after
mesa 2.3790 1.5994
vpr 2.6008 1.2078
gcc 1.9840 0.5273
mcf 0.2569 0.0470
eon 1.8468 1.4359
twolf 0.9475 0.2004
burg 1.6807 1.3300
lambda 1.2191 0.3764
Speedups range anyware from 30% to over 400% :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10712 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Alkis Evlogimenos
parent
1283d86b63
commit
7d629b50a5
@ -40,10 +40,8 @@ namespace {
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const MRegisterInfo* mri_;
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MachineFunction::iterator currentMbb_;
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MachineBasicBlock::iterator currentInstr_;
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typedef LiveIntervals::Intervals Intervals;
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const Intervals* li_;
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typedef std::vector<const LiveIntervals::Interval*> IntervalPtrs;
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IntervalPtrs active_, inactive_;
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IntervalPtrs unhandled_, fixed_, active_, inactive_;
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typedef std::vector<unsigned> Regs;
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Regs tempUseOperands_;
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@ -78,19 +76,23 @@ namespace {
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/// runOnMachineFunction - register allocate the whole function
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bool runOnMachineFunction(MachineFunction&);
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/// initIntervalSets - initializa the four interval sets:
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/// unhandled, fixed, active and inactive
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void initIntervalSets(const LiveIntervals::Intervals& li);
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/// processActiveIntervals - expire old intervals and move
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/// non-overlapping ones to the incative list
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void processActiveIntervals(Intervals::const_iterator cur);
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void processActiveIntervals(IntervalPtrs::value_type cur);
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/// processInactiveIntervals - expire old intervals and move
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/// overlapping ones to the active list
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void processInactiveIntervals(Intervals::const_iterator cur);
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void processInactiveIntervals(IntervalPtrs::value_type cur);
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/// assignStackSlotAtInterval - choose and spill
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/// interval. Currently we spill the interval with the last
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/// end point in the active and inactive lists and the current
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/// interval
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void assignStackSlotAtInterval(Intervals::const_iterator cur);
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void assignStackSlotAtInterval(IntervalPtrs::value_type cur);
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///
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/// register handling helpers
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@ -99,7 +101,7 @@ namespace {
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/// getFreePhysReg - return a free physical register for this
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/// virtual register interval if we have one, otherwise return
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/// 0
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unsigned getFreePhysReg(Intervals::const_iterator cur);
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unsigned getFreePhysReg(IntervalPtrs::value_type cur);
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/// physRegAvailable - returns true if the specifed physical
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/// register is available
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@ -195,9 +197,8 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
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mf_ = &fn;
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tm_ = &fn.getTarget();
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mri_ = tm_->getRegisterInfo();
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li_ = &getAnalysis<LiveIntervals>().getIntervals();
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active_.clear();
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inactive_.clear();
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initIntervalSets(getAnalysis<LiveIntervals>().getIntervals());
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v2pMap_.clear();
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v2ssMap_.clear();
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@ -223,61 +224,88 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
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reserved_[28] = true; /* FP5 */
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reserved_[29] = true; /* FP6 */
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// liner scan algorithm
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for (Intervals::const_iterator
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i = li_->begin(), e = li_->end(); i != e; ++i) {
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DEBUG(std::cerr << "processing current interval: " << *i << '\n');
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// linear scan algorithm
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DEBUG(printIntervals("\tactive", active_.begin(), active_.end()));
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DEBUG(printIntervals("\tinactive", inactive_.begin(), inactive_.end()));
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processActiveIntervals(i);
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processInactiveIntervals(i);
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DEBUG(printIntervals("\tunhandled", unhandled_.begin(), unhandled_.end()));
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DEBUG(printIntervals("\tfixed", fixed_.begin(), fixed_.end()));
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DEBUG(printIntervals("\tactive", active_.begin(), active_.end()));
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DEBUG(printIntervals("\tinactive", inactive_.begin(), inactive_.end()));
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while (!unhandled_.empty() || !fixed_.empty()) {
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// pick the interval with the earliest start point
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IntervalPtrs::value_type cur;
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if (fixed_.empty()) {
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cur = unhandled_.front();
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unhandled_.erase(unhandled_.begin());
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}
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else if (unhandled_.empty()) {
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cur = fixed_.front();
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fixed_.erase(fixed_.begin());
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}
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else if (unhandled_.front()->start() < fixed_.front()->start()) {
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cur = unhandled_.front();
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unhandled_.erase(unhandled_.begin());
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}
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else {
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cur = fixed_.front();
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fixed_.erase(fixed_.begin());
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}
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DEBUG(std::cerr << "processing current interval: " << *cur << '\n');
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processActiveIntervals(cur);
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processInactiveIntervals(cur);
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backupRegUse();
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// for every interval in inactive we overlap mark the register
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// as not free
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for (IntervalPtrs::iterator j = inactive_.begin();
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j != inactive_.end(); ++j) {
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unsigned reg = (*j)->reg;
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if (reg >= MRegisterInfo::FirstVirtualRegister)
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reg = v2pMap_[reg];
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if (i->overlaps(**j)) {
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markPhysRegNotFree(reg);
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}
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}
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// for every pre-allocated interval in unhandled we overlap
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// mark the register as not free
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for (Intervals::const_iterator j = i + 1; j != e; ++j) {
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if (j->reg < MRegisterInfo::FirstVirtualRegister &&
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i->overlaps(*j))
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markPhysRegNotFree(j->reg);
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}
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DEBUG(std::cerr << "\tallocating current interval:\n");
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// if this register is preallocated reserve it
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if (i->reg < MRegisterInfo::FirstVirtualRegister) {
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restoreRegUse();
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markPhysRegNotFree(i->reg);
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active_.push_back(&*i);
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// if this register is fixed we are done
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if (cur->reg < MRegisterInfo::FirstVirtualRegister) {
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markPhysRegNotFree(cur->reg);
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active_.push_back(cur);
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}
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// otherwise we are allocating a virtual register. try to find
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// a free physical register or spill an interval in order to
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// assign it one (we could spill the current though).
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else {
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unsigned physReg = getFreePhysReg(i);
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backupRegUse();
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// for every interval in inactive we overlap with, mark the
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// register as not free
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for (IntervalPtrs::const_iterator i = inactive_.begin(),
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e = inactive_.end(); i != e; ++i) {
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unsigned reg = (*i)->reg;
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if (reg >= MRegisterInfo::FirstVirtualRegister)
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reg = v2pMap_[reg];
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if (cur->overlaps(**i)) {
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markPhysRegNotFree(reg);
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}
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}
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// for every interval in fixed we overlap with,
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// mark the register as not free
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for (IntervalPtrs::const_iterator i = fixed_.begin(),
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e = fixed_.end(); i != e; ++i) {
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assert((*i)->reg < MRegisterInfo::FirstVirtualRegister &&
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"virtual register interval in fixed set?");
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if (cur->overlaps(**i))
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markPhysRegNotFree((*i)->reg);
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}
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DEBUG(std::cerr << "\tallocating current interval:\n");
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unsigned physReg = getFreePhysReg(cur);
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if (!physReg) {
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assignStackSlotAtInterval(i);
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assignStackSlotAtInterval(cur);
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}
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else {
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restoreRegUse();
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assignVirt2PhysReg(i->reg, physReg);
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active_.push_back(&*i);
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assignVirt2PhysReg(cur->reg, physReg);
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active_.push_back(cur);
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}
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}
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}
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DEBUG(printIntervals("\tactive", active_.begin(), active_.end()));
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DEBUG(printIntervals("\tinactive", inactive_.begin(), inactive_.end())); }
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// expire any remaining active intervals
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for (IntervalPtrs::iterator i = active_.begin(); i != active_.end(); ++i) {
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unsigned reg = (*i)->reg;
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@ -287,6 +315,8 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
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}
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markPhysRegFree(reg);
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}
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active_.clear();
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inactive_.clear();
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DEBUG(std::cerr << "finished register allocation\n");
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DEBUG(printVirt2PhysMap());
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@ -378,7 +408,22 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
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return true;
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}
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void RA::processActiveIntervals(Intervals::const_iterator cur)
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void RA::initIntervalSets(const LiveIntervals::Intervals& li)
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{
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assert(unhandled_.empty() && fixed_.empty() &&
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active_.empty() && inactive_.empty() &&
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"interval sets should be empty on initialization");
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for (LiveIntervals::Intervals::const_iterator i = li.begin(), e = li.end();
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i != e; ++i) {
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if (i->reg < MRegisterInfo::FirstVirtualRegister)
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fixed_.push_back(&*i);
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else
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unhandled_.push_back(&*i);
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}
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}
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void RA::processActiveIntervals(IntervalPtrs::value_type cur)
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{
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DEBUG(std::cerr << "\tprocessing active intervals:\n");
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for (IntervalPtrs::iterator i = active_.begin(); i != active_.end();) {
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@ -414,7 +459,7 @@ void RA::processActiveIntervals(Intervals::const_iterator cur)
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}
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}
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void RA::processInactiveIntervals(Intervals::const_iterator cur)
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void RA::processInactiveIntervals(IntervalPtrs::value_type cur)
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{
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DEBUG(std::cerr << "\tprocessing inactive intervals:\n");
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for (IntervalPtrs::iterator i = inactive_.begin(); i != inactive_.end();) {
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@ -459,7 +504,7 @@ namespace {
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}
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}
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void RA::assignStackSlotAtInterval(Intervals::const_iterator cur)
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void RA::assignStackSlotAtInterval(IntervalPtrs::value_type cur)
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{
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DEBUG(std::cerr << "\t\tassigning stack slot at interval "
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<< *cur << ":\n");
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@ -470,7 +515,8 @@ void RA::assignStackSlotAtInterval(Intervals::const_iterator cur)
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regWeight[i] = 0.0F;
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// for each interval in active that overlaps
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for (IntervalPtrs::iterator i = active_.begin(); i != active_.end(); ++i) {
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for (IntervalPtrs::const_iterator i = active_.begin(), e = active_.end();
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i != e; ++i) {
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if (!cur->overlaps(**i))
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continue;
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@ -484,8 +530,8 @@ void RA::assignStackSlotAtInterval(Intervals::const_iterator cur)
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}
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// for each interval in inactive that overlaps
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for (IntervalPtrs::iterator i = inactive_.begin();
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i != inactive_.end(); ++i) {
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for (IntervalPtrs::const_iterator i = inactive_.begin(),
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e = inactive_.end(); i != e; ++i) {
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if (!cur->overlaps(**i))
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continue;
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@ -498,13 +544,14 @@ void RA::assignStackSlotAtInterval(Intervals::const_iterator cur)
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updateWeight(regWeight, *as, (*i)->weight);
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}
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// for each fixed interval in unhandled that overlaps
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for (Intervals::const_iterator j = cur + 1; j != li_->end(); ++j) {
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if (j->reg >= MRegisterInfo::FirstVirtualRegister)
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continue;
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updateWeight(regWeight, j->reg, j->weight);
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for (const unsigned* as = mri_->getAliasSet(j->reg); *as; ++as)
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updateWeight(regWeight, *as, j->weight);
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// for each fixed interval that overlaps
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for (IntervalPtrs::const_iterator i = fixed_.begin(), e = fixed_.end();
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i != e; ++i) {
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assert((*i)->reg < MRegisterInfo::FirstVirtualRegister &&
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"virtual register interval in fixed set?");
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updateWeight(regWeight, (*i)->reg, (*i)->weight);
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for (const unsigned* as = mri_->getAliasSet((*i)->reg); *as; ++as)
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updateWeight(regWeight, *as, (*i)->weight);
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}
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float minWeight = std::numeric_limits<float>::max();
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@ -569,7 +616,7 @@ void RA::assignStackSlotAtInterval(Intervals::const_iterator cur)
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markPhysRegFree(spilled[i]);
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assignVirt2PhysReg(cur->reg, physReg);
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active_.push_back(&*cur);
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active_.push_back(cur);
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}
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}
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@ -581,7 +628,7 @@ bool RA::physRegAvailable(unsigned physReg)
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return !regUse_[physReg];
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}
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unsigned RA::getFreePhysReg(Intervals::const_iterator cur)
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unsigned RA::getFreePhysReg(IntervalPtrs::value_type cur)
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{
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DEBUG(std::cerr << "\t\tgetting free physical register: ");
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const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg);
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