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mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-04-22 00:37:49 +00:00

Added MMX and XMM packed integer move instructions, movd and movq.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26296 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2006-02-21 01:39:57 +00:00
parent 933be3318b
commit 7dbc0a3351

@ -3022,6 +3022,52 @@ def FLDCW16m : I<0xD9, MRM5m, // X87 control world = [mem16]
(ops i16mem:$dst), "fldcw $dst", []>;
//===----------------------------------------------------------------------===//
// MMX and XMM Packed Integer support (requires MMX, SSE, and SSE2)
//===----------------------------------------------------------------------===//
// Move Instructions
def MOVD64rr : I<0x6E, MRMSrcReg, (ops VR64:$dst, R32:$src),
"movd {$src, $dst|$dst, $src}", []>, TB,
Requires<[HasSSE1]>;
def MOVD64rm : I<0x6E, MRMSrcMem, (ops VR64:$dst, i32mem:$src),
"movd {$src, $dst|$dst, $src}", []>, TB,
Requires<[HasSSE1]>;
def MOVD64mr : I<0x7E, MRMDestMem, (ops i32mem:$dst, VR64:$src),
"movd {$src, $dst|$dst, $src}", []>, TB,
Requires<[HasSSE1]>;
def MOVD128rr : I<0x6E, MRMSrcReg, (ops VR128:$dst, R32:$src),
"movd {$src, $dst|$dst, $src}", []>, TB, OpSize,
Requires<[HasSSE2]>;
def MOVD128rm : I<0x6E, MRMSrcMem, (ops VR128:$dst, i32mem:$src),
"movd {$src, $dst|$dst, $src}", []>, TB, OpSize,
Requires<[HasSSE2]>;
def MOVD128mr : I<0x7E, MRMDestMem, (ops i32mem:$dst, VR128:$src),
"movd {$src, $dst|$dst, $src}", []>, TB, OpSize,
Requires<[HasSSE2]>;
def MOVQ64rr : I<0x6F, MRMSrcReg, (ops VR64:$dst, VR64:$src),
"movq {$src, $dst|$dst, $src}", []>, TB,
Requires<[HasSSE1]>;
def MOVQ64rm : I<0x6F, MRMSrcMem, (ops VR64:$dst, i64mem:$src),
"movq {$src, $dst|$dst, $src}", []>, TB,
Requires<[HasSSE1]>;
def MOVQ64mr : I<0x7F, MRMDestMem, (ops i64mem:$dst, VR64:$src),
"movq {$src, $dst|$dst, $src}", []>, TB,
Requires<[HasSSE1]>;
def MOVQ128rr : I<0x7E, MRMSrcReg, (ops VR128:$dst, VR64:$src),
"movq {$src, $dst|$dst, $src}", []>, XS,
Requires<[HasSSE2]>;
def MOVQ128rm : I<0x7E, MRMSrcMem, (ops VR128:$dst, i64mem:$src),
"movq {$src, $dst|$dst, $src}", []>, XS,
Requires<[HasSSE2]>;
def MOVQ128mr : I<0xD6, MRMSrcMem, (ops i64mem:$dst, VR128:$src),
"movq {$src, $dst|$dst, $src}", []>, TB, OpSize,
Requires<[HasSSE2]>;
//===----------------------------------------------------------------------===//
// XMM Packed Floating point support (requires SSE / SSE2)
//===----------------------------------------------------------------------===//