6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-09-14 15:25:25 +00:00
Code Issues Projects Releases Wiki Activity

[mips][microMIPS] Implement SWM16 and LWM16 instructions

Browse Source 
Differential Revision: http://reviews.llvm.org/D5579


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222901 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Zoran Jovanovic
2014-11-27 18:28:59 +00:00
parent 13fbabb7c8
commit 7dc6143a82
9 changed files with 162 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

24
lib/Target/Mips/Disassembler/MipsDisassembler.cpp
View File

@@ -380,6 +380,10 @@ static DecodeStatus DecodeRegListOperand(MCInst &Inst, unsigned Insn,
uint64_t Address,
const void *Decoder);
static DecodeStatus DecodeRegListOperand16(MCInst &Inst, unsigned Insn,
uint64_t Address,
const void *Decoder);
namespace llvm {
extern Target TheMipselTarget, TheMipsTarget, TheMips64Target,
TheMips64elTarget;
@@ -1609,3 +1613,23 @@ static DecodeStatus DecodeRegListOperand(MCInst &Inst,
return MCDisassembler::Success;
}
static DecodeStatus DecodeRegListOperand16(MCInst &Inst, unsigned Insn,
uint64_t Address,
const void *Decoder) {
unsigned Regs[] = {Mips::S0, Mips::S1, Mips::S2, Mips::S3};
unsigned RegNum;
unsigned RegLst = fieldFromInstruction(Insn, 4, 2);
// Empty register lists are not allowed.
if (RegLst == 0)
return MCDisassembler::Fail;
RegNum = RegLst & 0x3;
for (unsigned i = 0; i < RegNum - 1; i++)
Inst.addOperand(MCOperand::CreateReg(Regs[i]));
Inst.addOperand(MCOperand::CreateReg(Mips::RA));
return MCDisassembler::Success;
}