Convert more abort() calls to llvm_report_error().

Also remove trailing semicolon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75027 91177308-0d34-0410-b5e6-96231b3b80d8

include/llvm/CodeGen/MachineCodeEmitter.h

@@ -18,6 +18,8 @@
 #define LLVM_CODEGEN_MACHINECODEEMITTER_H
 
 #include "llvm/Support/DataTypes.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
 
 namespace llvm {
 

include/llvm/CodeGen/SelectionDAGISel.h

@@ -19,6 +19,8 @@
 #include "llvm/Pass.h"
 #include "llvm/Constant.h"
 #include "llvm/CodeGen/SelectionDAG.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
 
 namespace llvm {
   class FastISel;

include/llvm/Support/ErrorHandling.h

@@ -49,7 +49,7 @@ namespace llvm {
   void llvm_unreachable(void) NORETURN;
 }
 
-#define LLVM_UNREACHABLE(msg) do { assert(0 && msg); llvm_unreachable(); } while(0);
+#define LLVM_UNREACHABLE(msg) do { assert(0 && msg); llvm_unreachable(); } while(0)
 
 #endif
 

lib/Target/Alpha/AlphaCodeEmitter.cpp

@@ -26,6 +26,8 @@
 #include "llvm/Function.h"
 #include "llvm/Support/Compiler.h"
 #include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
 using namespace llvm;
 
 namespace {
@@ -164,8 +166,7 @@ static unsigned getAlphaRegNumber(unsigned Reg) {
   case Alpha::R30 : case Alpha::F30 : return 30;
   case Alpha::R31 : case Alpha::F31 : return 31;
   default:
-    assert(0 && "Unhandled reg");
+    LLVM_UNREACHABLE("Unhandled reg");
-    abort();
   }
 }
 
@@ -216,8 +217,7 @@ unsigned AlphaCodeEmitter::getMachineOpValue(const MachineInstr &MI,
       Offset = MI.getOperand(3).getImm();
       break;
     default:
-      assert(0 && "unknown relocatable instruction");
+      LLVM_UNREACHABLE("unknown relocatable instruction");
-      abort();
     }
     if (MO.isGlobal())
       MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(),
@@ -234,9 +234,11 @@ unsigned AlphaCodeEmitter::getMachineOpValue(const MachineInstr &MI,
   } else if (MO.isMBB()) {
     MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
                                                Alpha::reloc_bsr, MO.getMBB()));
-  }else {
+  } else {
-    cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
+    std::string msg;
-    abort();
+    raw_string_ostream Msg(msg);
+    Msg << "ERROR: Unknown type of MachineOperand: " << MO;
+    llvm_report_error(Msg.str());
   }
 
   return rv;

lib/Target/Alpha/AlphaISelDAGToDAG.cpp

@@ -323,7 +323,7 @@ SDNode *AlphaDAGToDAGISel::Select(SDValue Op) {
                                   T, CurDAG->getRegister(Alpha::F31, T),
                                   CurDAG->getRegister(Alpha::F31, T));
     } else {
-      abort();
+      llvm_report_error("Unhandled FP constant type");
     }
     break;
   }

lib/Target/Alpha/AlphaISelLowering.cpp

@@ -24,6 +24,7 @@
 #include "llvm/Module.h"
 #include "llvm/Intrinsics.h"
 #include "llvm/Support/CommandLine.h"
+#include "llvm/Support/ErrorHandling.h"
 using namespace llvm;
 
 /// AddLiveIn - This helper function adds the specified physical register to the
@@ -312,8 +313,7 @@ static SDValue LowerRET(SDValue Op, SelectionDAG &DAG) {
                                     SDValue());
   switch (Op.getNumOperands()) {
   default:
-    assert(0 && "Do not know how to return this many arguments!");
+    LLVM_UNREACHABLE("Do not know how to return this many arguments!");
-    abort();
   case 1: 
     break;
     //return SDValue(); // ret void is legal

lib/Target/Alpha/AlphaInstrInfo.cpp

@@ -19,6 +19,7 @@
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/Support/ErrorHandling.h"
 using namespace llvm;
 
 AlphaInstrInfo::AlphaInstrInfo()
@@ -200,7 +201,7 @@ AlphaInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
       .addReg(SrcReg, getKillRegState(isKill))
       .addFrameIndex(FrameIdx).addReg(Alpha::F31);
   else
-    abort();
+    llvm_report_error("Unhandled register class");
 }
 
 void AlphaInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
@@ -216,7 +217,7 @@ void AlphaInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
   else if (RC == Alpha::GPRCRegisterClass)
     Opc = Alpha::STQ;
   else
-    abort();
+    llvm_report_error("Unhandled register class");
   DebugLoc DL = DebugLoc::getUnknownLoc();
   MachineInstrBuilder MIB = 
     BuildMI(MF, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill));
@@ -245,7 +246,7 @@ AlphaInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
     BuildMI(MBB, MI, DL, get(Alpha::LDQ), DestReg)
       .addFrameIndex(FrameIdx).addReg(Alpha::F31);
   else
-    abort();
+    llvm_report_error("Unhandled register class");
 }
 
 void AlphaInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
@@ -260,7 +261,7 @@ void AlphaInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
   else if (RC == Alpha::GPRCRegisterClass)
     Opc = Alpha::LDQ;
   else
-    abort();
+    llvm_report_error("Unhandled register class");
   DebugLoc DL = DebugLoc::getUnknownLoc();
   MachineInstrBuilder MIB = 
     BuildMI(MF, DL, get(Opc), DestReg);

lib/Target/Alpha/AlphaJITInfo.cpp

@@ -184,8 +184,7 @@ extern "C" {
       );
 #else
   void AlphaCompilationCallback() {
-    cerr << "Cannot call AlphaCompilationCallback() on a non-Alpha arch!\n";
+    LLVM_UNREACHABLE("Cannot call AlphaCompilationCallback() on a non-Alpha arch!");
-    abort();
   }
 #endif
 }

lib/Target/Alpha/AlphaRegisterInfo.cpp

@@ -28,6 +28,8 @@
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
 #include "llvm/ADT/BitVector.h"
 #include "llvm/ADT/STLExtras.h"
 #include <cstdlib>
@@ -244,8 +246,10 @@ void AlphaRegisterInfo::emitPrologue(MachineFunction &MF) const {
     BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30)
       .addImm(getLower16(NumBytes)).addReg(Alpha::R30);
   } else {
-    cerr << "Too big a stack frame at " << NumBytes << "\n";
+    std::string msg;
-    abort();
+    raw_string_ostream Msg(msg); 
+    Msg << "Too big a stack frame at " + NumBytes;
+    llvm_report_error(Msg.str());
   }
 
   //now if we need to, save the old FP and set the new
@@ -294,8 +298,10 @@ void AlphaRegisterInfo::emitEpilogue(MachineFunction &MF,
       BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30)
         .addImm(getLower16(NumBytes)).addReg(Alpha::R30);
     } else {
-      cerr << "Too big a stack frame at " << NumBytes << "\n";
+      std::string msg;
-      abort();
+      raw_string_ostream Msg(msg); 
+      Msg << "Too big a stack frame at " + NumBytes;
+      llvm_report_error(Msg.str());
     }
   }
 }

lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp

@@ -25,6 +25,7 @@
 #include "llvm/Target/TargetAsmInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/Mangler.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/ADT/Statistic.h"
@@ -100,8 +101,7 @@ void AlphaAsmPrinter::printOp(const MachineOperand &MO, bool IsCallOp) {
     return;
 
   case MachineOperand::MO_Immediate:
-    cerr << "printOp() does not handle immediate values\n";
+    llvm_report_error("printOp() does not handle immediate values");
-    abort();
     return;
 
   case MachineOperand::MO_MachineBasicBlock:
@@ -188,8 +188,7 @@ bool AlphaAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
       // Print the assembly for the instruction.
       ++EmittedInsts;
       if (!printInstruction(II)) {
-        assert(0 && "Unhandled instruction in asm writer!");
+        LLVM_UNREACHABLE("Unhandled instruction in asm writer!");
-        abort();
       }
     }
   }
@@ -249,9 +248,7 @@ void AlphaAsmPrinter::printModuleLevelGV(const GlobalVariable* GVar) {
     case GlobalValue::PrivateLinkage:
       break;
     default:
-      assert(0 && "Unknown linkage type!");
+      LLVM_UNREACHABLE("Unknown linkage type!");
-      cerr << "Unknown linkage type!\n";
-      abort();
     }
 
   // 3: Type, Size, Align

lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp

@@ -26,6 +26,7 @@
 #include "llvm/CodeGen/DwarfWriter.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/Target/TargetAsmInfo.h"
+#include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/Mangler.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/ADT/Statistic.h"
@@ -317,16 +318,13 @@ void IA64AsmPrinter::printModuleLevelGV(const GlobalVariable* GVar) {
    case GlobalValue::PrivateLinkage:
     break;
    case GlobalValue::GhostLinkage:
-    cerr << "GhostLinkage cannot appear in IA64AsmPrinter!\n";
+    llvm_report_error("GhostLinkage cannot appear in IA64AsmPrinter!");
-    abort();
    case GlobalValue::DLLImportLinkage:
-    cerr << "DLLImport linkage is not supported by this target!\n";
+    llvm_report_error("DLLImport linkage is not supported by this target!");
-    abort();
    case GlobalValue::DLLExportLinkage:
-    cerr << "DLLExport linkage is not supported by this target!\n";
+    llvm_report_error("DLLExport linkage is not supported by this target!");
-    abort();
    default:
-    assert(0 && "Unknown linkage type!");
+    LLVM_UNREACHABLE("Unknown linkage type!");
   }
 
   EmitAlignment(Align, GVar);

lib/Target/IA64/IA64ISelLowering.cpp

@@ -19,6 +19,7 @@
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/SelectionDAG.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/Support/ErrorHandling.h"
 #include "llvm/Constants.h"
 #include "llvm/Function.h"
 using namespace llvm;
@@ -579,8 +580,7 @@ LowerOperation(SDValue Op, SelectionDAG &DAG) {
     
     switch(Op.getNumOperands()) {
      default:
-      assert(0 && "Do not know how to return this many arguments!");
+      LLVM_UNREACHABLE("Do not know how to return this many arguments!");
-      abort();
     case 1: 
       AR_PFSVal = DAG.getCopyFromReg(Op.getOperand(0), dl, VirtGPR, MVT::i64);
       AR_PFSVal = DAG.getCopyToReg(AR_PFSVal.getValue(1), dl, IA64::AR_PFS, 

lib/Target/MSP430/MSP430ISelLowering.cpp

@@ -32,6 +32,7 @@
 #include "llvm/CodeGen/SelectionDAGISel.h"
 #include "llvm/CodeGen/ValueTypes.h"
 #include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
 #include "llvm/ADT/VectorExtras.h"
 using namespace llvm;
 
@@ -190,11 +191,14 @@ SDValue MSP430TargetLowering::LowerCCCArguments(SDValue Op,
       // Arguments passed in registers
       MVT RegVT = VA.getLocVT();
       switch (RegVT.getSimpleVT()) {
-      default:
+      default: 
-        cerr << "LowerFORMAL_ARGUMENTS Unhandled argument type: "
+        {
-             << RegVT.getSimpleVT()
+          std::string msg;
-             << "\n";
+          raw_string_ostream Msg(msg);
-        abort();
+          Msg << "LowerFORMAL_ARGUMENTS Unhandled argument type: "
+            << RegVT.getSimpleVT();
+          llvm_report_error(Msg.str());
+        }
       case MVT::i16:
         unsigned VReg =
           RegInfo.createVirtualRegister(MSP430::GR16RegisterClass);

lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp

@@ -33,6 +33,7 @@
 #include "llvm/Target/TargetData.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetOptions.h"
+#include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/Mangler.h"
 #include "llvm/ADT/Statistic.h"
 #include "llvm/ADT/StringExtras.h"
@@ -405,7 +406,7 @@ printOperand(const MachineInstr *MI, int opNum)
       break;
   
     default:
-      O << "<unknown operand type>"; abort (); break;
+      llvm_report_error("<unknown operand type>"); break;
   }
 
   if (closeP) O << ")";
@@ -544,16 +545,13 @@ printModuleLevelGV(const GlobalVariable* GVar) {
       printSizeAndType = false;
     break;
    case GlobalValue::GhostLinkage:
-    cerr << "Should not have any unmaterialized functions!\n";
+    llvm_report_error("Should not have any unmaterialized functions!");
-    abort();
    case GlobalValue::DLLImportLinkage:
-    cerr << "DLLImport linkage is not supported by this target!\n";
+    llvm_report_error("DLLImport linkage is not supported by this target!");
-    abort();
    case GlobalValue::DLLExportLinkage:
-    cerr << "DLLExport linkage is not supported by this target!\n";
+    llvm_report_error("DLLExport linkage is not supported by this target!");
-    abort();
    default:
-    assert(0 && "Unknown linkage type!");
+    LLVM_UNREACHABLE("Unknown linkage type!");
   }
 
   EmitAlignment(Align, GVar);

lib/Target/PIC16/PIC16ISelLowering.cpp

@@ -23,6 +23,7 @@
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/Support/ErrorHandling.h"
 
 
 using namespace llvm;
@@ -1227,8 +1228,7 @@ SDValue PIC16TargetLowering::LowerRET(SDValue Op, SelectionDAG &DAG) {
 
   // return should have odd number of operands
   if ((Op.getNumOperands() % 2) == 0 ) {
-    assert(0 && "Do not know how to return this many arguments!");
+    LLVM_UNREACHABLE("Do not know how to return this many arguments!");
-    abort();
   }
   
   // Number of values to return 

lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp

@@ -26,6 +26,7 @@
 #include "llvm/CodeGen/MachineConstantPool.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/Target/TargetAsmInfo.h"
+#include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/Mangler.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/ADT/Statistic.h"
@@ -184,7 +185,7 @@ void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
       << MO.getIndex();
     break;
   default:
-    O << "<unknown operand type>"; abort (); break;
+    llvm_report_error("<unknown operand type>"); break;
   }
   if (CloseParen) O << ")";
 }
@@ -298,16 +299,13 @@ void SparcAsmPrinter::printModuleLevelGV(const GlobalVariable* GVar) {
    case GlobalValue::InternalLinkage:
     break;
    case GlobalValue::GhostLinkage:
-    cerr << "Should not have any unmaterialized functions!\n";
+    llvm_report_error("Should not have any unmaterialized functions!");
-    abort();
    case GlobalValue::DLLImportLinkage:
-    cerr << "DLLImport linkage is not supported by this target!\n";
+    llvm_report_error("DLLImport linkage is not supported by this target!");
-    abort();
    case GlobalValue::DLLExportLinkage:
-    cerr << "DLLExport linkage is not supported by this target!\n";
+    llvm_report_error("DLLExport linkage is not supported by this target!");
-    abort();
    default:
-    assert(0 && "Unknown linkage type!");
+    LLVM_UNREACHABLE("Unknown linkage type!");
   }
 
   EmitAlignment(Align, GVar);

lib/Target/X86/X86ISelLowering.cpp

@@ -1186,8 +1186,7 @@ LowerCallResult(SDValue Chain, SDValue InFlag, CallSDNode *TheCall,
     // If this is x86-64, and we disabled SSE, we can't return FP values
     if ((CopyVT == MVT::f32 || CopyVT == MVT::f64) &&
         ((Is64Bit || TheCall->isInreg()) && !Subtarget->hasSSE1())) {
-      cerr << "SSE register return with SSE disabled\n";
+      llvm_report_error("SSE register return with SSE disabled");
-      exit(1);
     }
 
     // If this is a call to a function that returns an fp value on the floating

lib/Target/XCore/XCoreAsmPrinter.cpp

@@ -32,6 +32,7 @@
 #include "llvm/ADT/Statistic.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/Support/CommandLine.h"
+#include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Support/raw_ostream.h"
 #include <algorithm>
@@ -186,8 +187,7 @@ emitGlobal(const GlobalVariable *GV)
 
     switch (GV->getLinkage()) {
     case GlobalValue::AppendingLinkage:
-      cerr << "AppendingLinkage is not supported by this target!\n";
+      llvm_report_error("AppendingLinkage is not supported by this target!");
-      abort();
     case GlobalValue::LinkOnceAnyLinkage:
     case GlobalValue::LinkOnceODRLinkage:
     case GlobalValue::WeakAnyLinkage:
@@ -204,14 +204,11 @@ emitGlobal(const GlobalVariable *GV)
     case GlobalValue::PrivateLinkage:
       break;
     case GlobalValue::GhostLinkage:
-      cerr << "Should not have any unmaterialized functions!\n";
+      llvm_report_error("Should not have any unmaterialized functions!");
-      abort();
     case GlobalValue::DLLImportLinkage:
-      cerr << "DLLImport linkage is not supported by this target!\n";
+      llvm_report_error("DLLImport linkage is not supported by this target!");
-      abort();
     case GlobalValue::DLLExportLinkage:
-      cerr << "DLLExport linkage is not supported by this target!\n";
+      llvm_report_error("DLLExport linkage is not supported by this target!");
-      abort();
     default:
       assert(0 && "Unknown linkage type!");
     }

lib/Target/XCore/XCoreISelLowering.cpp

@@ -270,9 +270,8 @@ LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG)
   }
   const Type *Ty = cast<PointerType>(GV->getType())->getElementType();
   if (!Ty->isSized() || isZeroLengthArray(Ty)) {
-    cerr << "Size of thread local object " << GVar->getName()
+    llvm_report_error("Size of thread local object " + GVar->getName()
-         << " is unknown\n";
+                      + " is unknown");
-    abort();
   }
   SDValue base = getGlobalAddressWrapper(GA, GV, DAG);
   const TargetData *TD = TM.getTargetData();
@@ -646,10 +645,13 @@ LowerCCCArguments(SDValue Op, SelectionDAG &DAG)
       MVT RegVT = VA.getLocVT();
       switch (RegVT.getSimpleVT()) {
       default:
-        cerr << "LowerFORMAL_ARGUMENTS Unhandled argument type: "
+        {
-             << RegVT.getSimpleVT()
+          std::string msg;
-             << "\n";
+          raw_string_ostream Msg(msg);
-        abort();
+          Msg << "LowerFORMAL_ARGUMENTS Unhandled argument type: "
+            << RegVT.getSimpleVT();
+          llvm_report_error(Msg.str());
+        }
       case MVT::i32:
         unsigned VReg = RegInfo.createVirtualRegister(
                           XCore::GRRegsRegisterClass);

lib/Target/XCore/XCoreRegisterInfo.cpp

@@ -30,6 +30,8 @@
 #include "llvm/ADT/BitVector.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
 
 using namespace llvm;
 
@@ -142,9 +144,11 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
       
       if (!isU6 && !isImmU16(Amount)) {
         // FIX could emit multiple instructions in this case.
-        cerr << "eliminateCallFramePseudoInstr size too big: "
+        std::string msg;
-             << Amount << "\n";
+        raw_string_ostream Msg(msg);
-        abort();
+        Msg  << "eliminateCallFramePseudoInstr size too big: "
+             << Amount;
+        llvm_report_error(Msg.str());
       }
 
       MachineInstr *New;
@@ -227,8 +231,10 @@ void XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
     MachineInstr *New = 0;
     if (!isUs) {
       if (!RS) {
-        cerr << "eliminateFrameIndex Frame size too big: " << Offset << "\n";
+        std::string msg;
-        abort();
+        raw_string_ostream Msg(msg);
+        Msg << "eliminateFrameIndex Frame size too big: " << Offset;
+        llvm_report_error(Msg.str());
       }
       unsigned ScratchReg = RS->scavengeRegister(XCore::GRRegsRegisterClass, II,
                                                  SPAdj);
@@ -278,9 +284,10 @@ void XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
   } else {
     bool isU6 = isImmU6(Offset);
     if (!isU6 && !isImmU16(Offset)) {
-      // FIXME could make this work for LDWSP, LDAWSP.
+      std::string msg;
-      cerr << "eliminateFrameIndex Frame size too big: " << Offset << "\n";
+      raw_string_ostream Msg(msg);
-      abort();
+      Msg << "eliminateFrameIndex Frame size too big: " << Offset;
+      llvm_report_error(Msg.str());
     }
 
     switch (MI.getOpcode()) {
@@ -354,8 +361,10 @@ loadConstant(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
   // TODO use mkmsk if possible.
   if (!isImmU16(Value)) {
     // TODO use constant pool.
-    cerr << "loadConstant value too big " << Value << "\n";
+    std::string msg;
-    abort();
+    raw_string_ostream Msg(msg);
+    Msg << "loadConstant value too big " << Value;
+    llvm_report_error(Msg.str());
   }
   int Opcode = isImmU6(Value) ? XCore::LDC_ru6 : XCore::LDC_lru6;
   BuildMI(MBB, I, dl, TII.get(Opcode), DstReg).addImm(Value);
@@ -368,8 +377,10 @@ storeToStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
   Offset/=4;
   bool isU6 = isImmU6(Offset);
   if (!isU6 && !isImmU16(Offset)) {
-    cerr << "storeToStack offset too big " << Offset << "\n";
+    std::string msg;
-    abort();
+    raw_string_ostream Msg(msg);
+    Msg << "storeToStack offset too big " << Offset;
+    llvm_report_error(Msg.str());
   }
   int Opcode = isU6 ? XCore::STWSP_ru6 : XCore::STWSP_lru6;
   BuildMI(MBB, I, dl, TII.get(Opcode))
@@ -384,8 +395,10 @@ loadFromStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
   Offset/=4;
   bool isU6 = isImmU6(Offset);
   if (!isU6 && !isImmU16(Offset)) {
-    cerr << "loadFromStack offset too big " << Offset << "\n";
+    std::string msg;
-    abort();
+    raw_string_ostream Msg(msg);
+    Msg << "loadFromStack offset too big " << Offset;
+    llvm_report_error(Msg.str());
   }
   int Opcode = isU6 ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6;
   BuildMI(MBB, I, dl, TII.get(Opcode), DstReg)
@@ -414,8 +427,10 @@ void XCoreRegisterInfo::emitPrologue(MachineFunction &MF) const {
 
   if (!isU6 && !isImmU16(FrameSize)) {
     // FIXME could emit multiple instructions.
-    cerr << "emitPrologue Frame size too big: " << FrameSize << "\n";
+    std::string msg;
-    abort();
+    raw_string_ostream Msg(msg);
+    Msg << "emitPrologue Frame size too big: " << FrameSize;
+    llvm_report_error(Msg.str());
   }
   bool emitFrameMoves = needsFrameMoves(MF);
 
@@ -538,8 +553,10 @@ void XCoreRegisterInfo::emitEpilogue(MachineFunction &MF,
 
   if (!isU6 && !isImmU16(FrameSize)) {
     // FIXME could emit multiple instructions.
-    cerr << "emitEpilogue Frame size too big: " << FrameSize << "\n";
+    std::string msg;
-    abort();
+    raw_string_ostream Msg(msg);
+    Msg << "emitEpilogue Frame size too big: " << FrameSize;
+    llvm_report_error(Msg.str());
   }
 
   if (FrameSize) {

utils/TableGen/CodeEmitterGen.cpp

@@ -243,8 +243,10 @@ void CodeEmitterGen::run(raw_ostream &o) {
 
   // Default case: unhandled opcode
   o << "  default:\n"
-    << "    cerr << \"Not supported instr: \" << MI << \"\\n\";\n"
+    << "    std::string msg;\n"
-    << "    abort();\n"
+    << "    raw_string_ostream Msg(msg);\n"
+    << "    Msg << \"Not supported instr: \" << MI;\n"
+    << "    llvm_report_error(Msg.str());\n"
     << "  }\n"
     << "  return Value;\n"
     << "}\n\n";

utils/TableGen/DAGISelEmitter.cpp

@@ -2083,20 +2083,19 @@ void DAGISelEmitter::EmitInstructionSelector(raw_ostream &OS) {
      << "}\n\n";
 
   OS << "void CannotYetSelect(SDValue N) DISABLE_INLINE {\n"
-     << "  cerr << \"Cannot yet select: \";\n"
+     << "  std::string msg;\n"
-     << "  N.getNode()->dump(CurDAG);\n"
+     << "  raw_string_ostream Msg(msg);\n"
-     << "  cerr << '\\n';\n"
+     << "  Msg << \"Cannot yet select: \";\n"
-     << "  abort();\n"
+     << "  N.getNode()->print(Msg, CurDAG);\n"
+     << "  llvm_report_error(Msg.str());\n"
      << "}\n\n";
 
   OS << "void CannotYetSelectIntrinsic(SDValue N) DISABLE_INLINE {\n"
      << "  cerr << \"Cannot yet select: \";\n"
      << "  unsigned iid = cast<ConstantSDNode>(N.getOperand("
      << "N.getOperand(0).getValueType() == MVT::Other))->getZExtValue();\n"
-     << "  cerr << \"intrinsic %\"<< "
+     << " llvm_report_error(\"Cannot yet select: intrinsic %\" +\n"
-     << "Intrinsic::getName((Intrinsic::ID)iid);\n"
+     << "Intrinsic::getName((Intrinsic::ID)iid));\n"
-     << "  cerr << '\\n';\n"
-     << "  abort();\n"
      << "}\n\n";
 }