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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-03 13:31:05 +00:00
Added support for correct spilling of %ccr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1112 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Ruchira Sasanka
parent
3839e6e309
commit
80b1a1a26a
@ -22,7 +22,7 @@ PhyRegAlloc::PhyRegAlloc(const Method *const M,
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Meth(M), TM(tm), LVI(Lvi), LRI(M, tm, RegClassList),
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MRI( tm.getRegInfo() ),
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NumOfRegClasses(MRI.getNumOfRegClasses()),
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AddedInstrMap(), StackOffsets(), PhiInstList()
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AddedInstrMap(), StackOffsets() /*, PhiInstList()*/
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{
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// **TODO: use an actual reserved color list
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@ -268,11 +268,11 @@ void PhyRegAlloc::buildInterferenceGraphs()
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addInterference( MInst->getImplicitRef(z), LVSetAI, isCallInst );
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}
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/*
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// record phi instrns in PhiInstList
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if( TM.getInstrInfo().isDummyPhiInstr(MInst->getOpCode()) )
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PhiInstList.push_back( MInst );
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*/
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} // for all machine instructions in BB
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@ -680,6 +680,8 @@ void PhyRegAlloc::insertCode4SpilledLR(const LiveRange *LR,
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}
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#endif
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//----------------------------------------------------------------------------
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// We can use the following method to get a temporary register to be used
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@ -687,9 +689,10 @@ void PhyRegAlloc::insertCode4SpilledLR(const LiveRange *LR,
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// this method will simply return that register and set MIBef = MIAft = NULL.
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// Otherwise, it will return a register and MIAft and MIBef will contain
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// two instructions used to free up this returned register.
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// Returned register number is the UNIFIED register number
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//----------------------------------------------------------------------------
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int PhyRegAlloc::getUsableRegAtMI(const RegClass *RC,
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int PhyRegAlloc::getUsableRegAtMI(RegClass *RC,
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const int RegType,
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const MachineInstr *MInst,
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const LiveVarSet *LVSetBef,
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@ -697,18 +700,21 @@ int PhyRegAlloc::getUsableRegAtMI(const RegClass *RC,
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MachineInstr *MIAft) {
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int Reg = getUnusedRegAtMI(RC, MInst, LVSetBef);
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Reg = MRI.getUnifiedRegNum(RC->getID(), Reg);
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if( Reg != -1) {
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// we found an unused register, so we can simply used
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MIBef = MIAft = NULL;
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}
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else {
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// we couldn't find an unused register. Generate code to ree up a reg by
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// we couldn't find an unused register. Generate code to free up a reg by
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// saving it on stack and restoring after the instruction
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int TmpOff = StackOffsets.getNewTmpPosOffFromFP();
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Reg = getRegNotUsedByThisInst(RC, MInst);
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MIBef = cpReg2MemMI(Reg, MRI.getFramePointer(), TmpOff, RegType );
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MIAft = cpMem2RegMI(MEI.getFramePointer(), TmpOff, Reg, RegType );
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MIBef = MRI.cpReg2MemMI(Reg, MRI.getFramePointer(), TmpOff, RegType );
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MIAft = MRI.cpMem2RegMI(MRI.getFramePointer(), TmpOff, Reg, RegType );
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}
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return Reg;
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@ -721,8 +727,10 @@ int PhyRegAlloc::getUsableRegAtMI(const RegClass *RC,
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// if it contains many spilled operands. Each time it is called, it finds
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// a register which is not live at that instruction and also which is not
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// used by other spilled operands of the same instruction.
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// Return register number is relative to the register class. NOT
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// unified number
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//----------------------------------------------------------------------------
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int PhyRegAlloc::getUnusedRegAtMI(const RegClass *RC,
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int PhyRegAlloc::getUnusedRegAtMI(RegClass *RC,
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const MachineInstr *MInst,
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const LiveVarSet *LVSetBef) {
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@ -730,7 +738,7 @@ int PhyRegAlloc::getUnusedRegAtMI(const RegClass *RC,
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bool *IsColorUsedArr = RC->getIsColorUsedArr();
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for(unsigned i=0; i < NumAvailRegs; i++);
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for(unsigned i=0; i < NumAvailRegs; i++)
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IsColorUsedArr[i] = false;
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LiveVarSet::const_iterator LIt = LVSetBef->begin();
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@ -767,7 +775,6 @@ int PhyRegAlloc::getUnusedRegAtMI(const RegClass *RC,
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}
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#endif
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//----------------------------------------------------------------------------
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// This method modifies the IsColorUsedArr of the register class passed to it.
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@ -1120,56 +1127,6 @@ void PhyRegAlloc::allocateStackSpace4SpilledLRs()
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void PhyRegAlloc::insertPhiEleminateInstrns() {
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vector< const MachineInstr *>:: const_iterator It = PhiInstList.begin();
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for( ; It != PhiInstList.end(); ++It ) {
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const MachineInstr *PhiMI = *It;
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Value *Def = (PhiMI->getOperand(0)).getVRegValue();
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const LiveRange *LROfDef = LRI.getLiveRangeForValue( Def );
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assert(LROfDef && "NO LR for a def of phi");
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for(unsigned OpNum=1; OpNum < PhiMI->getNumOperands(); ++OpNum) {
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if( OpNum % 2) { // i.e., the
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Value *Use = (PhiMI->getOperand(OpNum)).getVRegValue();
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const LiveRange *LROfUse = LRI.getLiveRangeForValue( Use );
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if( LROfUse != LROfDef) {
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// the result of the phi received a live range different to
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// that of this use, so copy it
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const BasicBlock *BB =
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(BasicBlock *) (PhiMI->getOperand(OpNum+1)).getVRegValue();
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MachineCodeForBasicBlock& MIVec = (BB)->getMachineInstrVec();
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MachineInstr *AdI = MRI.cpValue2Value(Use, Def);
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MIVec.push_back( AdI );
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cerr << "\n%%% Added a phi elimination instr: " << *AdI;
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} // if LRs are different
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} // if operand is an incoming Value (i.e., not a BB)
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} // for all phi operands
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} // for all phi instrns in PhiInstMap
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}
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//----------------------------------------------------------------------------
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// The entry pont to Register Allocation
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//----------------------------------------------------------------------------
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@ -156,7 +156,7 @@ class PhyRegAlloc
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RegStackOffsets StackOffsets;
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vector<const MachineInstr *> PhiInstList; // a list of all phi instrs
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//vector<const MachineInstr *> PhiInstList; // a list of all phi instrs
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//------- private methods ---------------------------------------------------
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@ -194,9 +194,20 @@ class PhyRegAlloc
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void printMachineCode();
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friend class UltraSparcRegInfo;
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int getUsableRegAtMI(RegClass *RC, const int RegType, const MachineInstr *MInst,
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const LiveVarSet *LVSetBef, MachineInstr *MIBef,
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MachineInstr *MIAft );
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int getUnusedRegAtMI(RegClass *RC, const MachineInstr *MInst,
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const LiveVarSet *LVSetBef);
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void setRegsUsedByThisInst(RegClass *RC, const MachineInstr *MInst );
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int getRegNotUsedByThisInst(RegClass *RC, const MachineInstr *MInst);
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void PhyRegAlloc::insertPhiEleminateInstrns();
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public:
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@ -22,7 +22,7 @@ PhyRegAlloc::PhyRegAlloc(const Method *const M,
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Meth(M), TM(tm), LVI(Lvi), LRI(M, tm, RegClassList),
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MRI( tm.getRegInfo() ),
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NumOfRegClasses(MRI.getNumOfRegClasses()),
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AddedInstrMap(), StackOffsets(), PhiInstList()
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AddedInstrMap(), StackOffsets() /*, PhiInstList()*/
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{
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// **TODO: use an actual reserved color list
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@ -268,11 +268,11 @@ void PhyRegAlloc::buildInterferenceGraphs()
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addInterference( MInst->getImplicitRef(z), LVSetAI, isCallInst );
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}
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/*
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// record phi instrns in PhiInstList
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if( TM.getInstrInfo().isDummyPhiInstr(MInst->getOpCode()) )
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PhiInstList.push_back( MInst );
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*/
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} // for all machine instructions in BB
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@ -680,6 +680,8 @@ void PhyRegAlloc::insertCode4SpilledLR(const LiveRange *LR,
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}
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#endif
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//----------------------------------------------------------------------------
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// We can use the following method to get a temporary register to be used
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@ -687,9 +689,10 @@ void PhyRegAlloc::insertCode4SpilledLR(const LiveRange *LR,
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// this method will simply return that register and set MIBef = MIAft = NULL.
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// Otherwise, it will return a register and MIAft and MIBef will contain
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// two instructions used to free up this returned register.
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// Returned register number is the UNIFIED register number
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//----------------------------------------------------------------------------
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int PhyRegAlloc::getUsableRegAtMI(const RegClass *RC,
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int PhyRegAlloc::getUsableRegAtMI(RegClass *RC,
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const int RegType,
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const MachineInstr *MInst,
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const LiveVarSet *LVSetBef,
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@ -697,18 +700,21 @@ int PhyRegAlloc::getUsableRegAtMI(const RegClass *RC,
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MachineInstr *MIAft) {
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int Reg = getUnusedRegAtMI(RC, MInst, LVSetBef);
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Reg = MRI.getUnifiedRegNum(RC->getID(), Reg);
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if( Reg != -1) {
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// we found an unused register, so we can simply used
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MIBef = MIAft = NULL;
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}
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else {
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// we couldn't find an unused register. Generate code to ree up a reg by
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// we couldn't find an unused register. Generate code to free up a reg by
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// saving it on stack and restoring after the instruction
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int TmpOff = StackOffsets.getNewTmpPosOffFromFP();
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Reg = getRegNotUsedByThisInst(RC, MInst);
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MIBef = cpReg2MemMI(Reg, MRI.getFramePointer(), TmpOff, RegType );
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MIAft = cpMem2RegMI(MEI.getFramePointer(), TmpOff, Reg, RegType );
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MIBef = MRI.cpReg2MemMI(Reg, MRI.getFramePointer(), TmpOff, RegType );
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MIAft = MRI.cpMem2RegMI(MRI.getFramePointer(), TmpOff, Reg, RegType );
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}
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return Reg;
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@ -721,8 +727,10 @@ int PhyRegAlloc::getUsableRegAtMI(const RegClass *RC,
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// if it contains many spilled operands. Each time it is called, it finds
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// a register which is not live at that instruction and also which is not
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// used by other spilled operands of the same instruction.
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// Return register number is relative to the register class. NOT
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// unified number
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//----------------------------------------------------------------------------
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int PhyRegAlloc::getUnusedRegAtMI(const RegClass *RC,
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int PhyRegAlloc::getUnusedRegAtMI(RegClass *RC,
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const MachineInstr *MInst,
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const LiveVarSet *LVSetBef) {
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@ -730,7 +738,7 @@ int PhyRegAlloc::getUnusedRegAtMI(const RegClass *RC,
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bool *IsColorUsedArr = RC->getIsColorUsedArr();
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for(unsigned i=0; i < NumAvailRegs; i++);
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for(unsigned i=0; i < NumAvailRegs; i++)
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IsColorUsedArr[i] = false;
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LiveVarSet::const_iterator LIt = LVSetBef->begin();
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@ -767,7 +775,6 @@ int PhyRegAlloc::getUnusedRegAtMI(const RegClass *RC,
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}
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#endif
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//----------------------------------------------------------------------------
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// This method modifies the IsColorUsedArr of the register class passed to it.
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@ -1120,56 +1127,6 @@ void PhyRegAlloc::allocateStackSpace4SpilledLRs()
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void PhyRegAlloc::insertPhiEleminateInstrns() {
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vector< const MachineInstr *>:: const_iterator It = PhiInstList.begin();
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for( ; It != PhiInstList.end(); ++It ) {
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const MachineInstr *PhiMI = *It;
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Value *Def = (PhiMI->getOperand(0)).getVRegValue();
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const LiveRange *LROfDef = LRI.getLiveRangeForValue( Def );
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assert(LROfDef && "NO LR for a def of phi");
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for(unsigned OpNum=1; OpNum < PhiMI->getNumOperands(); ++OpNum) {
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if( OpNum % 2) { // i.e., the
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Value *Use = (PhiMI->getOperand(OpNum)).getVRegValue();
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const LiveRange *LROfUse = LRI.getLiveRangeForValue( Use );
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if( LROfUse != LROfDef) {
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// the result of the phi received a live range different to
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// that of this use, so copy it
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const BasicBlock *BB =
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(BasicBlock *) (PhiMI->getOperand(OpNum+1)).getVRegValue();
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MachineCodeForBasicBlock& MIVec = (BB)->getMachineInstrVec();
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MachineInstr *AdI = MRI.cpValue2Value(Use, Def);
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MIVec.push_back( AdI );
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cerr << "\n%%% Added a phi elimination instr: " << *AdI;
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} // if LRs are different
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} // if operand is an incoming Value (i.e., not a BB)
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} // for all phi operands
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} // for all phi instrns in PhiInstMap
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}
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//----------------------------------------------------------------------------
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// The entry pont to Register Allocation
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//----------------------------------------------------------------------------
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@ -156,7 +156,7 @@ class PhyRegAlloc
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RegStackOffsets StackOffsets;
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vector<const MachineInstr *> PhiInstList; // a list of all phi instrs
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//vector<const MachineInstr *> PhiInstList; // a list of all phi instrs
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//------- private methods ---------------------------------------------------
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@ -194,9 +194,20 @@ class PhyRegAlloc
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void printMachineCode();
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friend class UltraSparcRegInfo;
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int getUsableRegAtMI(RegClass *RC, const int RegType, const MachineInstr *MInst,
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const LiveVarSet *LVSetBef, MachineInstr *MIBef,
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MachineInstr *MIAft );
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int getUnusedRegAtMI(RegClass *RC, const MachineInstr *MInst,
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const LiveVarSet *LVSetBef);
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void setRegsUsedByThisInst(RegClass *RC, const MachineInstr *MInst );
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int getRegNotUsedByThisInst(RegClass *RC, const MachineInstr *MInst);
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void PhyRegAlloc::insertPhiEleminateInstrns();
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public:
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