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add ppc64 r+i stores with update.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31776 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2006-11-16 00:57:19 +00:00
parent 74531e49ef
commit 80df01d2cf
2 changed files with 72 additions and 40 deletions
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27
lib/Target/PowerPC/PPCHazardRecognizers.cpp
View File

@ -234,28 +234,26 @@ void PPCHazardRecognizer970::EmitInstruction(SDNode *Node) {
unsigned ThisStoreSize; unsigned ThisStoreSize;
switch (Opcode) { switch (Opcode) {
default: assert(0 && "Unknown store instruction!"); default: assert(0 && "Unknown store instruction!");
case PPC::STB: case PPC::STBU: case PPC::STB: case PPC::STB8:
case PPC::STBX: case PPC::STBU: case PPC::STBU8:
case PPC::STB8: case PPC::STBX: case PPC::STBX8:
case PPC::STBX8:
case PPC::STVEBX: case PPC::STVEBX:
ThisStoreSize = 1; ThisStoreSize = 1;
break; break;
case PPC::STH: case PPC::STHU: case PPC::STH: case PPC::STH8:
case PPC::STHX: case PPC::STHU: case PPC::STHU8:
case PPC::STH8: case PPC::STHX: case PPC::STHX8:
case PPC::STHX8:
case PPC::STVEHX: case PPC::STVEHX:
case PPC::STHBRX: case PPC::STHBRX:
ThisStoreSize = 2; ThisStoreSize = 2;
break; break;
case PPC::STFS: case PPC::STFSU: case PPC::STFS:
case PPC::STFSU:
case PPC::STFSX: case PPC::STFSX:
case PPC::STWX: case PPC::STWX: case PPC::STWX8:
case PPC::STWUX: case PPC::STWUX:
case PPC::STW: case PPC::STWU: case PPC::STW: case PPC::STW8:
case PPC::STW8: case PPC::STWU: case PPC::STWU8:
case PPC::STWX8:
case PPC::STVEWX: case PPC::STVEWX:
case PPC::STFIWX: case PPC::STFIWX:
case PPC::STWBRX: case PPC::STWBRX:
@ -263,7 +261,8 @@ void PPCHazardRecognizer970::EmitInstruction(SDNode *Node) {
break; break;
case PPC::STD_32: case PPC::STD_32:
case PPC::STDX_32: case PPC::STDX_32:
case PPC::STD: case PPC::STDU: case PPC::STD:
case PPC::STDU:
case PPC::STFD: case PPC::STFD:
case PPC::STFDX: case PPC::STFDX:
case PPC::STDX: case PPC::STDX:

85
lib/Target/PowerPC/PPCInstr64Bit.td
View File

@ -356,32 +356,6 @@ def LDU : DSForm_1<58, 1, (ops G8RC:$rD, ptr_rc:$ea_result, memrix:$addr),
} }
let isStore = 1, noResults = 1, PPC970_Unit = 2 in { let isStore = 1, noResults = 1, PPC970_Unit = 2 in {
// Normal stores.
def STD : DSForm_1<62, 0, (ops G8RC:$rS, memrix:$dst),
"std $rS, $dst", LdStSTD,
[(store G8RC:$rS, ixaddr:$dst)]>, isPPC64;
def STDX : XForm_8<31, 149, (ops G8RC:$rS, memrr:$dst),
"stdx $rS, $dst", LdStSTD,
[(store G8RC:$rS, xaddr:$dst)]>, isPPC64,
PPC970_DGroup_Cracked;
def STDU : DSForm_1<62, 1, (ops G8RC:$ea_res, G8RC:$rS, memrix:$dst),
"stdu $rS, $dst", LdStSTD,
[]>, isPPC64;
def STDUX : XForm_8<31, 181, (ops G8RC:$rS, memrr:$dst),
"stdux $rS, $dst", LdStSTD,
[]>, isPPC64;
// STD_32/STDX_32 - Just like STD/STDX, but uses a '32-bit' input register.
def STD_32 : DSForm_1<62, 0, (ops GPRC:$rT, memrix:$dst),
"std $rT, $dst", LdStSTD,
[(PPCstd_32 GPRC:$rT, ixaddr:$dst)]>, isPPC64;
def STDX_32 : XForm_8<31, 149, (ops GPRC:$rT, memrr:$dst),
"stdx $rT, $dst", LdStSTD,
[(PPCstd_32 GPRC:$rT, xaddr:$dst)]>, isPPC64,
PPC970_DGroup_Cracked;
// Truncating stores. // Truncating stores.
def STB8 : DForm_1<38, (ops G8RC:$rS, memri:$src), def STB8 : DForm_1<38, (ops G8RC:$rS, memri:$src),
"stb $rS, $src", LdStGeneral, "stb $rS, $src", LdStGeneral,
@ -404,6 +378,65 @@ def STWX8 : XForm_8<31, 151, (ops G8RC:$rS, memrr:$dst),
"stwx $rS, $dst", LdStGeneral, "stwx $rS, $dst", LdStGeneral,
[(truncstorei32 G8RC:$rS, xaddr:$dst)]>, [(truncstorei32 G8RC:$rS, xaddr:$dst)]>,
PPC970_DGroup_Cracked; PPC970_DGroup_Cracked;
// Normal 8-byte stores.
def STD : DSForm_1<62, 0, (ops G8RC:$rS, memrix:$dst),
"std $rS, $dst", LdStSTD,
[(store G8RC:$rS, ixaddr:$dst)]>, isPPC64;
def STDX : XForm_8<31, 149, (ops G8RC:$rS, memrr:$dst),
"stdx $rS, $dst", LdStSTD,
[(store G8RC:$rS, xaddr:$dst)]>, isPPC64,
PPC970_DGroup_Cracked;
}
let isStore = 1, PPC970_Unit = 2 in {
def STBU8 : DForm_1<38, (ops ptr_rc:$ea_res, G8RC:$rS,
symbolLo:$ptroff, ptr_rc:$ptrreg),
"stbu $rS, $ptroff($ptrreg)", LdStGeneral,
[(set ptr_rc:$ea_res,
(pre_truncsti8 G8RC:$rS, ptr_rc:$ptrreg,
iaddroff:$ptroff))]>,
RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">;
def STHU8 : DForm_1<45, (ops ptr_rc:$ea_res, G8RC:$rS,
symbolLo:$ptroff, ptr_rc:$ptrreg),
"sthu $rS, $ptroff($ptrreg)", LdStGeneral,
[(set ptr_rc:$ea_res,
(pre_truncsti16 G8RC:$rS, ptr_rc:$ptrreg,
iaddroff:$ptroff))]>,
RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">;
def STWU8 : DForm_1<37, (ops ptr_rc:$ea_res, G8RC:$rS,
symbolLo:$ptroff, ptr_rc:$ptrreg),
"stwu $rS, $ptroff($ptrreg)", LdStGeneral,
[(set ptr_rc:$ea_res, (pre_store G8RC:$rS, ptr_rc:$ptrreg,
iaddroff:$ptroff))]>,
RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">;
def STDU : DSForm_1<62, 1, (ops ptr_rc:$ea_res, G8RC:$rS,
symbolLo:$ptroff, ptr_rc:$ptrreg),
"stdu $rS, $ptroff($ptrreg)", LdStSTD,
[(set ptr_rc:$ea_res, (pre_store G8RC:$rS, ptr_rc:$ptrreg,
iaddroff:$ptroff))]>,
RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">,
isPPC64;
}
let isStore = 1, noResults = 1, PPC970_Unit = 2 in {
def STDUX : XForm_8<31, 181, (ops G8RC:$rS, memrr:$dst),
"stdux $rS, $dst", LdStSTD,
[]>, isPPC64;
// STD_32/STDX_32 - Just like STD/STDX, but uses a '32-bit' input register.
def STD_32 : DSForm_1<62, 0, (ops GPRC:$rT, memrix:$dst),
"std $rT, $dst", LdStSTD,
[(PPCstd_32 GPRC:$rT, ixaddr:$dst)]>, isPPC64;
def STDX_32 : XForm_8<31, 149, (ops GPRC:$rT, memrr:$dst),
"stdx $rT, $dst", LdStSTD,
[(PPCstd_32 GPRC:$rT, xaddr:$dst)]>, isPPC64,
PPC970_DGroup_Cracked;
} }