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AArch64: treat HFAs containing "half" types as blocks too.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223669 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover 2014-12-08 17:54:58 +00:00
parent eafdf26d89
commit 811474b929
2 changed files with 12 additions and 0 deletions
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5
lib/Target/AArch64/AArch64CallingConvention.h
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@ -28,6 +28,9 @@ using namespace llvm;
static const uint16_t XRegList[] = {AArch64::X0, AArch64::X1, AArch64::X2,
AArch64::X3, AArch64::X4, AArch64::X5,
AArch64::X6, AArch64::X7};
static const uint16_t HRegList[] = {AArch64::H0, AArch64::H1, AArch64::H2,
AArch64::H3, AArch64::H4, AArch64::H5,
AArch64::H6, AArch64::H7};
static const uint16_t SRegList[] = {AArch64::S0, AArch64::S1, AArch64::S2,
AArch64::S3, AArch64::S4, AArch64::S5,
AArch64::S6, AArch64::S7};
@ -88,6 +91,8 @@ static bool CC_AArch64_Custom_Block(unsigned &ValNo, MVT &ValVT, MVT &LocVT,
ArrayRef<uint16_t> RegList;
if (LocVT.SimpleTy == MVT::i64)
RegList = XRegList;
else if (LocVT.SimpleTy == MVT::f16)
RegList = HRegList;
else if (LocVT.SimpleTy == MVT::f32 || LocVT.is32BitVector())
RegList = SRegList;
else if (LocVT.SimpleTy == MVT::f64 || LocVT.is64BitVector())

7
test/CodeGen/AArch64/argument-blocks.ll
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@ -188,3 +188,10 @@ define <16 x i8> @test_v16i8_blocked([7 x double], [2 x <16 x i8>] %in) {
%val = extractvalue [2 x <16 x i8>] %in, 0
ret <16 x i8> %val
}
define half @test_f16_blocked([7 x double], [2 x half] %in) {
; CHECK-LABEL: test_f16_blocked:
; CHECK: ldr h0, [sp]
%val = extractvalue [2 x half] %in, 0
ret half %val
}