6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-25 00:33:15 +00:00
Code Issues Projects Releases Wiki Activity

Return the base register of a register list for the "getReg()" method. This is

Browse Source 
to satisfy the ClassifyOperand method of the Asm matcher without having to add a
RegList type to every back-end.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118360 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling 2010-11-06 22:19:43 +00:00
parent 7ad3147f98
commit 8155e5b753
1 changed files with 8 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
View File

@ -129,7 +129,7 @@ class ARMOperand : public MCParsedAsmOperand {
bool Writeback;
} Reg;
struct {
struct {
unsigned RegStart;
unsigned Number;
} RegList;
@ -198,8 +198,13 @@ public:
}
unsigned getReg() const {
assert(Kind == Register && "Invalid access!");
return Reg.RegNum;
assert((Kind == Register || Kind == RegisterList) && "Invalid access!");
unsigned RegNum = 0;
if (Kind == Register)
RegNum = Reg.RegNum;
else
RegNum = RegList.RegStart;
return RegNum;
}
std::pair<unsigned, unsigned> getRegList() const {