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Revert "SelectionDAG: Enable (and (setcc x), (setcc y)) -> (setcc (and x, y)) for vectors"

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This reverts commit r210540, adds a testcase for the regression it
caused, and marks the R600 test it was supposed to fix as XFAIL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210792 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard 2014-06-12 16:04:47 +00:00
parent 5eba90a861
commit 82a51defb6
3 changed files with 52 additions and 4 deletions
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8
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -2758,24 +2758,24 @@ SDValue DAGCombiner::visitAND(SDNode *N) {
ISD::CondCode Op0 = cast<CondCodeSDNode>(CC0)->get();
ISD::CondCode Op1 = cast<CondCodeSDNode>(CC1)->get();
if (LR == RR && Op0 == Op1 &&
if (LR == RR && isa<ConstantSDNode>(LR) && Op0 == Op1 &&
LL.getValueType().isInteger()) {
// fold (and (seteq X, 0), (seteq Y, 0)) -> (seteq (or X, Y), 0)
if (TLI.isConstFalseVal(LR.getNode()) && Op1 == ISD::SETEQ) {
if (cast<ConstantSDNode>(LR)->isNullValue() && Op1 == ISD::SETEQ) {
SDValue ORNode = DAG.getNode(ISD::OR, SDLoc(N0),
LR.getValueType(), LL, RL);
AddToWorkList(ORNode.getNode());
return DAG.getSetCC(SDLoc(N), VT, ORNode, LR, Op1);
}
// fold (and (seteq X, -1), (seteq Y, -1)) -> (seteq (and X, Y), -1)
if (TLI.isConstTrueVal(LR.getNode()) && Op1 == ISD::SETEQ) {
if (cast<ConstantSDNode>(LR)->isAllOnesValue() && Op1 == ISD::SETEQ) {
SDValue ANDNode = DAG.getNode(ISD::AND, SDLoc(N0),
LR.getValueType(), LL, RL);
AddToWorkList(ANDNode.getNode());
return DAG.getSetCC(SDLoc(N), VT, ANDNode, LR, Op1);
}
// fold (and (setgt X, -1), (setgt Y, -1)) -> (setgt (or X, Y), -1)
if (TLI.isConstTrueVal(LR.getNode()) && Op1 == ISD::SETGT) {
if (cast<ConstantSDNode>(LR)->isAllOnesValue() && Op1 == ISD::SETGT) {
SDValue ORNode = DAG.getNode(ISD::OR, SDLoc(N0),
LR.getValueType(), LL, RL);
AddToWorkList(ORNode.getNode());

1
test/CodeGen/R600/setcc-equivalent.ll
View File

@ -1,4 +1,5 @@
; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG %s
; XFAIL: *
; EG-LABEL: @and_setcc_setcc_i32
; EG: AND_INT

47
test/CodeGen/X86/dagcombine-and-setcc.ll Normal file
View File

@ -0,0 +1,47 @@
; RUN: llc < %s | FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.10.0"
; Function Attrs: nounwind
declare i32 @printf(i8* nocapture readonly, ...)
; On X86 1 is true and 0 is false, so we can't perform the combine:
; (and (setgt X, true), (setgt Y, true)) -> (setgt (or X, Y), true)
; This combine only works if the true value is -1.
;CHECK: cmpl
;CHECK: setg
;CHECK: cmpl
;CHECK: setg
;CHECK: andb
@.str = private unnamed_addr constant [4 x i8] c"%d\0A\00", align 1
; Function Attrs: optsize ssp uwtable
define i32 @foo(i32 %a, i32 %b, i32 * %c) {
if.else429:
%cmp.i1144 = icmp eq i32* %c, null
%cmp430 = icmp slt i32 %a, 2
%cmp432 = icmp slt i32 %b, 2
%or.cond710 = or i1 %cmp430, %cmp432
%or.cond710.not = xor i1 %or.cond710, true
%brmerge1448 = or i1 %cmp.i1144, %or.cond710.not
br i1 %brmerge1448, label %ret1, label %ret2
ret1:
ret i32 0
ret2:
ret i32 1
}
define i32 @main(i32 %argc, i8** nocapture readnone %argv) {
%res = alloca i32, align 4
%t = call i32 @foo(i32 1, i32 2, i32* %res) #3
%v = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([4 x i8]* @.str, i64 0, i64 0), i32 %t)
ret i32 0
}