6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-11-02 07:11:49 +00:00
Code Issues Projects Releases Wiki Activity

[Sparc] Add support for decoding call instructions in the sparc disassembler.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202577 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Venkatraman Govindaraju 2014-03-01 08:30:58 +00:00
parent abad3545bd
commit 830156c660
3 changed files with 27 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
View File

@ -190,6 +190,8 @@ static DecodeStatus DecodeStoreDFP(MCInst &Inst, unsigned insn,
uint64_t Address, const void *Decoder);
static DecodeStatus DecodeStoreQFP(MCInst &Inst, unsigned insn,
uint64_t Address, const void *Decoder);
static DecodeStatus DecodeCall(MCInst &Inst, unsigned insn,
uint64_t Address, const void *Decoder);
#include "SparcGenDisassemblerTables.inc"
@ -336,3 +338,22 @@ static DecodeStatus DecodeStoreQFP(MCInst &Inst, unsigned insn,
return DecodeMem(Inst, insn, Address, Decoder, false,
DecodeQFPRegsRegisterClass);
}
static bool tryAddingSymbolicOperand(int64_t Value, bool isBranch,
uint64_t Address, uint64_t Offset,
uint64_t Width, MCInst &MI,
const void *Decoder) {
const MCDisassembler *Dis = static_cast<const MCDisassembler*>(Decoder);
return Dis->tryAddingSymbolicOperand(MI, Value, Address, isBranch,
Offset, Width);
}
static DecodeStatus DecodeCall(MCInst &MI, unsigned insn,
uint64_t Address, const void *Decoder) {
unsigned tgt = fieldFromInstruction(insn, 0, 30);
tgt <<= 2;
if (!tryAddingSymbolicOperand(tgt+Address, false, Address,
0, 30, MI, Decoder))
MI.addOperand(MCOperand::CreateImm(tgt));
return MCDisassembler::Success;
}

5
lib/Target/Sparc/SparcInstrInfo.td
View File

@ -106,6 +106,7 @@ def brtarget : Operand<OtherVT> {
def calltarget : Operand<i32> {
let EncoderMethod = "getCallTargetOpValue";
let DecoderMethod = "DecodeCall";
}
// Operand for printing out a condition code.
@ -577,8 +578,8 @@ let Uses = [FCC] in
// This is the only Format 1 instruction
let Uses = [O6],
hasDelaySlot = 1, isCall = 1 in {
def CALL : InstSP<(outs), (ins calltarget:$dst, variable_ops),
"call $dst", []> {
def CALL : InstSP<(outs), (ins calltarget:$disp, variable_ops),
"call $disp", []> {
bits<30> disp;
let op = 1;
let Inst{29-0} = disp;

3
test/MC/Disassembler/Sparc/sparc.txt
View File

@ -170,3 +170,6 @@
# CHECK: restore
0x81 0xe8 0x00 0x00
# CHECK: call 16
0x40 0x00 0x00 0x04