6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-19 04:32:19 +00:00
Code Issues Projects Releases Wiki Activity

Comment grammaro/clarification.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72706 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dale Johannesen 2009-06-01 23:13:42 +00:00
parent 69bbb4cd39
commit 8313899851
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
lib/Target/PIC16/PIC16ISelLowering.cpp
View File

@ -1409,10 +1409,10 @@ SDValue PIC16TargetLowering::LowerADD(SDValue Op, SelectionDAG &DAG) {
// Put one value on stack.
SDValue NewVal = ConvertToMemOperand (Op.getOperand(MemOp), DAG, dl);
// ADDC and ADDE produces two results.
// ADDC and ADDE produce two results.
SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Flag);
// ADDE has three operands, the last one is a flag.
// ADDE has three operands, the last one is the carry bit.
if (Op.getOpcode() == ISD::ADDE)
return DAG.getNode(Op.getOpcode(), dl, Tys, Op.getOperand(MemOp ^ 1),
NewVal, Op.getOperand(2));