Remove the --shrink-wrap option.

It had no tests, was unused and was "experimental at best".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193749 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola 2013-10-31 14:07:59 +00:00
parent 424f19732e
commit 83dd2ae095
4 changed files with 69 additions and 1394 deletions

View File

@ -89,7 +89,6 @@ add_llvm_library(LLVMCodeGen
ScheduleDAGPrinter.cpp
ScoreboardHazardRecognizer.cpp
ShadowStackGC.cpp
ShrinkWrapping.cpp
SjLjEHPrepare.cpp
SlotIndexes.cpp
SpillPlacement.cpp

View File

@ -14,9 +14,6 @@
// This pass must be run after register allocation. After this pass is
// executed, it is illegal to construct MO_FrameIndex operands.
//
// This pass provides an optional shrink wrapping variant of prolog/epilog
// insertion, enabled via --shrink-wrap. See ShrinkWrapping.cpp.
//
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "pei"
@ -66,6 +63,38 @@ STATISTIC(NumScavengedRegs, "Number of frame index regs scavenged");
STATISTIC(NumBytesStackSpace,
"Number of bytes used for stack in all functions");
void PEI::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesCFG();
AU.addPreserved<MachineLoopInfo>();
AU.addPreserved<MachineDominatorTree>();
AU.addRequired<TargetPassConfig>();
MachineFunctionPass::getAnalysisUsage(AU);
}
bool PEI::isReturnBlock(MachineBasicBlock* MBB) {
return (MBB && !MBB->empty() && MBB->back().isReturn());
}
/// Compute the set of return blocks
void PEI::calculateSets(MachineFunction &Fn) {
// Sets used to compute spill, restore placement sets.
const std::vector<CalleeSavedInfo> &CSI =
Fn.getFrameInfo()->getCalleeSavedInfo();
// If no CSRs used, we are done.
if (CSI.empty())
return;
// Save refs to entry and return blocks.
EntryBlock = Fn.begin();
for (MachineFunction::iterator MBB = Fn.begin(), E = Fn.end();
MBB != E; ++MBB)
if (isReturnBlock(MBB))
ReturnBlocks.push_back(MBB);
return;
}
/// runOnMachineFunction - Insert prolog/epilog code and replace abstract
/// frame indexes with appropriate references.
///
@ -93,12 +122,8 @@ bool PEI::runOnMachineFunction(MachineFunction &Fn) {
calculateCalleeSavedRegisters(Fn);
// Determine placement of CSR spill/restore code:
// - With shrink wrapping, place spills and restores to tightly
// enclose regions in the Machine CFG of the function where
// they are used.
// - Without shink wrapping (default), place all spills in the
// entry block, all restores in return blocks.
placeCSRSpillsAndRestores(Fn);
// place all spills in the entry block, all restores in return blocks.
calculateSets(Fn);
// Add the code to save and restore the callee saved registers
if (!F->hasFnAttribute(Attribute::Naked))
@ -141,7 +166,7 @@ bool PEI::runOnMachineFunction(MachineFunction &Fn) {
<< ") in " << Fn.getName() << ".\n";
delete RS;
clearAllSets();
ReturnBlocks.clear();
return true;
}
@ -283,7 +308,7 @@ void PEI::calculateCalleeSavedRegisters(MachineFunction &F) {
}
/// insertCSRSpillsAndRestores - Insert spill and restore code for
/// callee saved registers used in the function, handling shrink wrapping.
/// callee saved registers used in the function.
///
void PEI::insertCSRSpillsAndRestores(MachineFunction &Fn) {
// Get callee saved register information.
@ -301,133 +326,33 @@ void PEI::insertCSRSpillsAndRestores(MachineFunction &Fn) {
const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo();
MachineBasicBlock::iterator I;
if (!ShrinkWrapThisFunction) {
// Spill using target interface.
I = EntryBlock->begin();
if (!TFI->spillCalleeSavedRegisters(*EntryBlock, I, CSI, TRI)) {
for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
// Add the callee-saved register as live-in.
// It's killed at the spill.
EntryBlock->addLiveIn(CSI[i].getReg());
// Insert the spill to the stack frame.
unsigned Reg = CSI[i].getReg();
const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
TII.storeRegToStackSlot(*EntryBlock, I, Reg, true,
CSI[i].getFrameIdx(), RC, TRI);
}
}
// Restore using target interface.
for (unsigned ri = 0, re = ReturnBlocks.size(); ri != re; ++ri) {
MachineBasicBlock* MBB = ReturnBlocks[ri];
I = MBB->end(); --I;
// Skip over all terminator instructions, which are part of the return
// sequence.
MachineBasicBlock::iterator I2 = I;
while (I2 != MBB->begin() && (--I2)->isTerminator())
I = I2;
bool AtStart = I == MBB->begin();
MachineBasicBlock::iterator BeforeI = I;
if (!AtStart)
--BeforeI;
// Restore all registers immediately before the return and any
// terminators that precede it.
if (!TFI->restoreCalleeSavedRegisters(*MBB, I, CSI, TRI)) {
for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
unsigned Reg = CSI[i].getReg();
const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
TII.loadRegFromStackSlot(*MBB, I, Reg,
CSI[i].getFrameIdx(),
RC, TRI);
assert(I != MBB->begin() &&
"loadRegFromStackSlot didn't insert any code!");
// Insert in reverse order. loadRegFromStackSlot can insert
// multiple instructions.
if (AtStart)
I = MBB->begin();
else {
I = BeforeI;
++I;
}
}
}
}
return;
}
// Insert spills.
std::vector<CalleeSavedInfo> blockCSI;
for (CSRegBlockMap::iterator BI = CSRSave.begin(),
BE = CSRSave.end(); BI != BE; ++BI) {
MachineBasicBlock* MBB = BI->first;
CSRegSet save = BI->second;
if (save.empty())
continue;
blockCSI.clear();
for (CSRegSet::iterator RI = save.begin(),
RE = save.end(); RI != RE; ++RI) {
blockCSI.push_back(CSI[*RI]);
}
assert(blockCSI.size() > 0 &&
"Could not collect callee saved register info");
I = MBB->begin();
// When shrink wrapping, use stack slot stores/loads.
for (unsigned i = 0, e = blockCSI.size(); i != e; ++i) {
// Spill using target interface.
I = EntryBlock->begin();
if (!TFI->spillCalleeSavedRegisters(*EntryBlock, I, CSI, TRI)) {
for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
// Add the callee-saved register as live-in.
// It's killed at the spill.
MBB->addLiveIn(blockCSI[i].getReg());
EntryBlock->addLiveIn(CSI[i].getReg());
// Insert the spill to the stack frame.
unsigned Reg = blockCSI[i].getReg();
unsigned Reg = CSI[i].getReg();
const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
TII.storeRegToStackSlot(*MBB, I, Reg,
true,
blockCSI[i].getFrameIdx(),
TII.storeRegToStackSlot(*EntryBlock, I, Reg, true, CSI[i].getFrameIdx(),
RC, TRI);
}
}
for (CSRegBlockMap::iterator BI = CSRRestore.begin(),
BE = CSRRestore.end(); BI != BE; ++BI) {
MachineBasicBlock* MBB = BI->first;
CSRegSet restore = BI->second;
// Restore using target interface.
for (unsigned ri = 0, re = ReturnBlocks.size(); ri != re; ++ri) {
MachineBasicBlock *MBB = ReturnBlocks[ri];
I = MBB->end();
--I;
if (restore.empty())
continue;
blockCSI.clear();
for (CSRegSet::iterator RI = restore.begin(),
RE = restore.end(); RI != RE; ++RI) {
blockCSI.push_back(CSI[*RI]);
}
assert(blockCSI.size() > 0 &&
"Could not find callee saved register info");
// If MBB is empty and needs restores, insert at the _beginning_.
if (MBB->empty()) {
I = MBB->begin();
} else {
I = MBB->end();
--I;
// Skip over all terminator instructions, which are part of the
// return sequence.
if (! I->isTerminator()) {
++I;
} else {
MachineBasicBlock::iterator I2 = I;
while (I2 != MBB->begin() && (--I2)->isTerminator())
I = I2;
}
}
// Skip over all terminator instructions, which are part of the return
// sequence.
MachineBasicBlock::iterator I2 = I;
while (I2 != MBB->begin() && (--I2)->isTerminator())
I = I2;
bool AtStart = I == MBB->begin();
MachineBasicBlock::iterator BeforeI = I;
@ -436,21 +361,21 @@ void PEI::insertCSRSpillsAndRestores(MachineFunction &Fn) {
// Restore all registers immediately before the return and any
// terminators that precede it.
for (unsigned i = 0, e = blockCSI.size(); i != e; ++i) {
unsigned Reg = blockCSI[i].getReg();
const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
TII.loadRegFromStackSlot(*MBB, I, Reg,
blockCSI[i].getFrameIdx(),
RC, TRI);
assert(I != MBB->begin() &&
"loadRegFromStackSlot didn't insert any code!");
// Insert in reverse order. loadRegFromStackSlot can insert
// multiple instructions.
if (AtStart)
I = MBB->begin();
else {
I = BeforeI;
++I;
if (!TFI->restoreCalleeSavedRegisters(*MBB, I, CSI, TRI)) {
for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
unsigned Reg = CSI[i].getReg();
const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
TII.loadRegFromStackSlot(*MBB, I, Reg, CSI[i].getFrameIdx(), RC, TRI);
assert(I != MBB->begin() &&
"loadRegFromStackSlot didn't insert any code!");
// Insert in reverse order. loadRegFromStackSlot can insert
// multiple instructions.
if (AtStart)
I = MBB->begin();
else {
I = BeforeI;
++I;
}
}
}
}

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@ -14,9 +14,6 @@
// This pass must be run after register allocation. After this pass is
// executed, it is illegal to construct MO_FrameIndex operands.
//
// This pass also implements a shrink wrapping variant of prolog/epilog
// insertion.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_PEI_H
@ -54,74 +51,16 @@ namespace llvm {
// stack frame indexes.
unsigned MinCSFrameIndex, MaxCSFrameIndex;
// Analysis info for spill/restore placement.
// "CSR": "callee saved register".
// CSRegSet contains indices into the Callee Saved Register Info
// vector built by calculateCalleeSavedRegisters() and accessed
// via MF.getFrameInfo()->getCalleeSavedInfo().
typedef SparseBitVector<> CSRegSet;
// CSRegBlockMap maps MachineBasicBlocks to sets of callee
// saved register indices.
typedef DenseMap<MachineBasicBlock*, CSRegSet> CSRegBlockMap;
// Set and maps for computing CSR spill/restore placement:
// used in function (UsedCSRegs)
// used in a basic block (CSRUsed)
// anticipatable in a basic block (Antic{In,Out})
// available in a basic block (Avail{In,Out})
// to be spilled at the entry to a basic block (CSRSave)
// to be restored at the end of a basic block (CSRRestore)
CSRegSet UsedCSRegs;
CSRegBlockMap CSRUsed;
CSRegBlockMap AnticIn, AnticOut;
CSRegBlockMap AvailIn, AvailOut;
CSRegBlockMap CSRSave;
CSRegBlockMap CSRRestore;
// Entry and return blocks of the current function.
MachineBasicBlock* EntryBlock;
SmallVector<MachineBasicBlock*, 4> ReturnBlocks;
// Map of MBBs to top level MachineLoops.
DenseMap<MachineBasicBlock*, MachineLoop*> TLLoops;
// Flag to control shrink wrapping per-function:
// may choose to skip shrink wrapping for certain
// functions.
bool ShrinkWrapThisFunction;
// Flag to control whether to use the register scavenger to resolve
// frame index materialization registers. Set according to
// TRI->requiresFrameIndexScavenging() for the curren function.
bool FrameIndexVirtualScavenging;
#ifndef NDEBUG
// Machine function handle.
MachineFunction* MF;
// Flag indicating that the current function
// has at least one "short" path in the machine
// CFG from the entry block to an exit block.
bool HasFastExitPath;
#endif
bool calculateSets(MachineFunction &Fn);
bool calcAnticInOut(MachineBasicBlock* MBB);
bool calcAvailInOut(MachineBasicBlock* MBB);
void calculateAnticAvail(MachineFunction &Fn);
bool addUsesForMEMERegion(MachineBasicBlock* MBB,
SmallVectorImpl<MachineBasicBlock *> &blks);
bool addUsesForTopLevelLoops(SmallVectorImpl<MachineBasicBlock *> &blks);
bool calcSpillPlacements(MachineBasicBlock* MBB,
SmallVectorImpl<MachineBasicBlock *> &blks,
CSRegBlockMap &prevSpills);
bool calcRestorePlacements(MachineBasicBlock* MBB,
SmallVectorImpl<MachineBasicBlock *> &blks,
CSRegBlockMap &prevRestores);
void placeSpillsAndRestores(MachineFunction &Fn);
void placeCSRSpillsAndRestores(MachineFunction &Fn);
void calculateSets(MachineFunction &Fn);
void calculateCallsInformation(MachineFunction &Fn);
void calculateCalleeSavedRegisters(MachineFunction &Fn);
void insertCSRSpillsAndRestores(MachineFunction &Fn);
@ -132,44 +71,8 @@ namespace llvm {
void scavengeFrameVirtualRegs(MachineFunction &Fn);
void insertPrologEpilogCode(MachineFunction &Fn);
// Initialize DFA sets, called before iterations.
void clearAnticAvailSets();
// Clear all sets constructed by shrink wrapping.
void clearAllSets();
// Initialize all shrink wrapping data.
void initShrinkWrappingInfo();
// Convienences for dealing with machine loops.
MachineBasicBlock* getTopLevelLoopPreheader(MachineLoop* LP);
MachineLoop* getTopLevelLoopParent(MachineLoop *LP);
// Propgate CSRs used in MBB to all MBBs of loop LP.
void propagateUsesAroundLoop(MachineBasicBlock* MBB, MachineLoop* LP);
// Convenience for recognizing return blocks.
bool isReturnBlock(MachineBasicBlock* MBB);
#ifndef NDEBUG
// Debugging methods.
// Mark this function as having fast exit paths.
void findFastExitPath();
// Verify placement of spills/restores.
void verifySpillRestorePlacement();
std::string getBasicBlockName(const MachineBasicBlock* MBB);
std::string stringifyCSRegSet(const CSRegSet& s);
void dumpSet(const CSRegSet& s);
void dumpUsed(MachineBasicBlock* MBB);
void dumpAllUsed();
void dumpSets(MachineBasicBlock* MBB);
void dumpSets1(MachineBasicBlock* MBB);
void dumpAllSets();
void dumpSRSets();
#endif
};
} // End llvm namespace
#endif

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