6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-03-14 00:31:06 +00:00
Code Issues Projects Releases Wiki Activity

[ms-inline asm] Remove the MatchInstruction() function. Previously, this was

Browse Source 
the interface between the front-end and the MC layer when parsing inline
assembly.  Unfortunately, this is too deep into the parsing stack. Specifically,
we're unable to handle target-independent assembly (i.e., assembly directives,
labels, etc.).  Note the MatchAndEmitInstruction() isn't the correct
abstraction either.  I'll be exposing target-independent hooks shortly, so this
is really just a cleanup.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165858 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chad Rosier 2012-10-13 00:26:04 +00:00
parent fa8cd9d64a
commit 84125ca43c
7 changed files with 51 additions and 64 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
include/llvm/MC/MCParser/MCAsmParser.h
View File

@ -73,6 +73,8 @@ public:
/// Run - Run the parser on the input source buffer.
virtual bool Run(bool NoInitialTextSection, bool NoFinalize = false) = 0;
virtual void setParsingInlineAsm(bool V) = 0;
/// Warning - Emit a warning at the location \p L, with the message \p Msg.
///
/// \return The return value is true, if warnings are fatal.

22
include/llvm/MC/MCTargetAsmParser.h
View File

@ -82,21 +82,6 @@ public:
/// otherwise.
virtual bool mnemonicIsValid(StringRef Mnemonic) = 0;
/// MatchInstruction - Recognize a series of operands of a parsed instruction
/// as an actual MCInst. This returns false on success and returns true on
/// failure to match.
///
/// On failure, the target parser is responsible for emitting a diagnostic
/// explaining the match failure.
virtual bool
MatchInstruction(SMLoc IDLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out, unsigned &Opcode, unsigned &OrigErrorInfo,
bool MatchingInlineAsm = false) {
OrigErrorInfo = ~0x0;
return true;
}
/// MatchAndEmitInstruction - Recognize a series of operands of a parsed
/// instruction as an actual MCInst and emit it to the specified MCStreamer.
/// This returns false on success and returns true on failure to match.
@ -104,9 +89,10 @@ public:
/// On failure, the target parser is responsible for emitting a diagnostic
/// explaining the match failure.
virtual bool
MatchAndEmitInstruction(SMLoc IDLoc,
MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out) = 0;
MCStreamer &Out, unsigned &ErrorInfo,
bool MatchingInlineAsm) = 0;
/// checkTargetMatchPredicate - Validate the instruction match against
/// any complex target predicates not expressible via match classes.
@ -115,7 +101,7 @@ public:
}
virtual void convertToMapAndConstraints(unsigned Kind,
const SmallVectorImpl<MCParsedAsmOperand*> &Operands) = 0;
const SmallVectorImpl<MCParsedAsmOperand*> &Operands) = 0;
};
} // End llvm namespace

20
lib/MC/MCParser/AsmParser.cpp
View File

@ -133,6 +133,9 @@ private:
/// IsDarwin - is Darwin compatibility enabled?
bool IsDarwin;
/// ParsingInlineAsm - are we parsing ms-style inline assembly?
bool ParsingInlineAsm;
public:
AsmParser(SourceMgr &SM, MCContext &Ctx, MCStreamer &Out,
const MCAsmInfo &MAI);
@ -171,6 +174,8 @@ public:
virtual const AsmToken &Lex();
void setParsingInlineAsm(bool V) { ParsingInlineAsm = V; }
bool ParseExpression(const MCExpr *&Res);
virtual bool ParseExpression(const MCExpr *&Res, SMLoc &EndLoc);
virtual bool ParseParenExpression(const MCExpr *&Res, SMLoc &EndLoc);
@ -412,7 +417,7 @@ AsmParser::AsmParser(SourceMgr &_SM, MCContext &_Ctx,
: Lexer(_MAI), Ctx(_Ctx), Out(_Out), MAI(_MAI), SrcMgr(_SM),
GenericParser(new GenericAsmParser), PlatformParser(0),
CurBuffer(0), MacrosEnabled(true), CppHashLineNumber(0),
AssemblerDialect(~0U), IsDarwin(false) {
AssemblerDialect(~0U), IsDarwin(false), ParsingInlineAsm(false) {
// Save the old handler.
SavedDiagHandler = SrcMgr.getDiagHandler();
SavedDiagContext = SrcMgr.getDiagContext();
@ -604,7 +609,7 @@ bool AsmParser::Run(bool NoInitialTextSection, bool NoFinalize) {
}
void AsmParser::CheckForValidSection() {
if (!getStreamer().getCurrentSection()) {
if (!ParsingInlineAsm && !getStreamer().getCurrentSection()) {
TokError("expected section directive before assembly directive");
Out.SwitchSection(Ctx.getMachOSection(
"__TEXT", "__text",
@ -1346,9 +1351,14 @@ bool AsmParser::ParseStatement() {
}
// If parsing succeeded, match the instruction.
if (!HadError)
HadError = getTargetParser().MatchAndEmitInstruction(IDLoc, ParsedOperands,
Out);
if (!HadError) {
unsigned Opcode;
unsigned ErrorInfo;
HadError = getTargetParser().MatchAndEmitInstruction(IDLoc, Opcode,
ParsedOperands,
Out, ErrorInfo,
ParsingInlineAsm);
}
// Free any parsed operands.
for (unsigned i = 0, e = ParsedOperands.size(); i != e; ++i)

13
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
View File

@ -259,9 +259,10 @@ public:
unsigned checkTargetMatchPredicate(MCInst &Inst);
bool MatchAndEmitInstruction(SMLoc IDLoc,
bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out);
MCStreamer &Out, unsigned &ErrorInfo,
bool MatchingInlineAsm);
};
} // end anonymous namespace
@ -7474,14 +7475,14 @@ unsigned ARMAsmParser::checkTargetMatchPredicate(MCInst &Inst) {
static const char *getSubtargetFeatureName(unsigned Val);
bool ARMAsmParser::
MatchAndEmitInstruction(SMLoc IDLoc,
MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out) {
MCStreamer &Out, unsigned &ErrorInfo,
bool MatchingInlineAsm) {
MCInst Inst;
unsigned ErrorInfo;
unsigned MatchResult;
MatchResult = MatchInstructionImpl(Operands, Inst, ErrorInfo,
/*matchingInlineAsm*/ false);
MatchingInlineAsm);
switch (MatchResult) {
default: break;
case Match_Success:

11
lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp
View File

@ -44,9 +44,10 @@ class MBlazeAsmParser : public MCTargetAsmParser {
bool ParseDirectiveWord(unsigned Size, SMLoc L);
bool MatchAndEmitInstruction(SMLoc IDLoc,
bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out);
MCStreamer &Out, unsigned &ErrorInfo,
bool MatchingInlineAsm);
/// @name Auto-generated Match Functions
/// {
@ -312,11 +313,11 @@ static unsigned MatchRegisterName(StringRef Name);
/// }
//
bool MBlazeAsmParser::
MatchAndEmitInstruction(SMLoc IDLoc,
MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out) {
MCStreamer &Out, unsigned &ErrorInfo,
bool MatchingInlineAsm) {
MCInst Inst;
unsigned ErrorInfo;
switch (MatchInstructionImpl(Operands, Inst, ErrorInfo,
/*matchingInlineAsm*/ false)) {
default: break;

13
lib/Target/Mips/AsmParser/MipsAsmParser.cpp
View File

@ -67,9 +67,10 @@ class MipsAsmParser : public MCTargetAsmParser {
#define GET_ASSEMBLER_HEADER
#include "MipsGenAsmMatcher.inc"
bool MatchAndEmitInstruction(SMLoc IDLoc,
bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out);
MCStreamer &Out, unsigned &ErrorInfo,
bool MatchingInlineAsm);
bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
@ -452,13 +453,13 @@ void MipsAsmParser::expandLoadAddressImm(MCInst &Inst, SMLoc IDLoc,
}
bool MipsAsmParser::
MatchAndEmitInstruction(SMLoc IDLoc,
MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out) {
MCStreamer &Out, unsigned &ErrorInfo,
bool MatchingInlineAsm) {
MCInst Inst;
unsigned ErrorInfo;
unsigned MatchResult = MatchInstructionImpl(Operands, Inst, ErrorInfo,
/*matchingInlineAsm*/ false);
MatchingInlineAsm);
switch (MatchResult) {
default: break;

34
lib/Target/X86/AsmParser/X86AsmParser.cpp
View File

@ -63,13 +63,10 @@ private:
bool processInstruction(MCInst &Inst,
const SmallVectorImpl<MCParsedAsmOperand*> &Ops);
bool MatchAndEmitInstruction(SMLoc IDLoc,
bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out);
bool MatchInstruction(SMLoc IDLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out, unsigned &Opcode,
unsigned &OrigErrorInfo, bool MatchingInlineAsm = false);
MCStreamer &Out, unsigned &ErrorInfo,
bool MatchingInlineAsm);
/// isSrcOp - Returns true if operand is either (%rsi) or %ds:%(rsi)
/// in 64bit mode or (%esi) or %es:(%esi) in 32bit mode.
@ -1519,20 +1516,10 @@ processInstruction(MCInst &Inst,
}
bool X86AsmParser::
MatchAndEmitInstruction(SMLoc IDLoc,
MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out) {
unsigned Opcode;
unsigned ErrorInfo;
bool Error = MatchInstruction(IDLoc, Operands, Out, Opcode, ErrorInfo);
return Error;
}
bool X86AsmParser::
MatchInstruction(SMLoc IDLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out, unsigned &Opcode, unsigned &OrigErrorInfo,
bool MatchingInlineAsm) {
MCStreamer &Out, unsigned &ErrorInfo,
bool MatchingInlineAsm) {
assert(!Operands.empty() && "Unexpect empty operand list!");
X86Operand *Op = static_cast<X86Operand*>(Operands[0]);
assert(Op->isToken() && "Leading operand should always be a mnemonic!");
@ -1573,7 +1560,7 @@ MatchInstruction(SMLoc IDLoc,
// First, try a direct match.
switch (MatchInstructionImpl(Operands, Inst,
OrigErrorInfo, MatchingInlineAsm,
ErrorInfo, MatchingInlineAsm,
isParsingIntelSyntax())) {
default: break;
case Match_Success:
@ -1651,7 +1638,6 @@ MatchInstruction(SMLoc IDLoc,
if (!MatchingInlineAsm)
Out.EmitInstruction(Inst);
Opcode = Inst.getOpcode();
// FIXME: Handle the map and constraints.
return false;
}
@ -1696,12 +1682,12 @@ MatchInstruction(SMLoc IDLoc,
}
// Recover location info for the operand if we know which was the problem.
if (OrigErrorInfo != ~0U) {
if (OrigErrorInfo >= Operands.size())
if (ErrorInfo != ~0U) {
if (ErrorInfo >= Operands.size())
return Error(IDLoc, "too few operands for instruction",
EmptyRanges, MatchingInlineAsm);
X86Operand *Operand = (X86Operand*)Operands[OrigErrorInfo];
X86Operand *Operand = (X86Operand*)Operands[ErrorInfo];
if (Operand->getStartLoc().isValid()) {
SMRange OperandRange = Operand->getLocRange();
return Error(Operand->getStartLoc(), "invalid operand for instruction",