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Convert more loops to range-based equivalents

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207714 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Alexey Samsonov 2014-04-30 22:17:38 +00:00
parent fff0879df0
commit 846781235d
13 changed files with 103 additions and 130 deletions
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25
lib/CodeGen/AsmPrinter/DbgValueHistoryCalculator.cpp
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@ -36,19 +36,16 @@ void calculateDbgValueHistory(const MachineFunction *MF,
for (MachineFunction::const_iterator I = MF->begin(), E = MF->end(); I != E; for (MachineFunction::const_iterator I = MF->begin(), E = MF->end(); I != E;
++I) { ++I) {
bool AtBlockEntry = true; bool AtBlockEntry = true;
for (MachineBasicBlock::const_iterator II = I->begin(), IE = I->end(); for (const auto &MI : *I) {
II != IE; ++II) { if (MI.isDebugValue()) {
const MachineInstr *MI = II; assert(MI.getNumOperands() > 1 && "Invalid machine instruction!");
if (MI->isDebugValue()) {
assert(MI->getNumOperands() > 1 && "Invalid machine instruction!");
// Keep track of user variables. // Keep track of user variables.
const MDNode *Var = MI->getDebugVariable(); const MDNode *Var = MI.getDebugVariable();
// Variable is in a register, we need to check for clobbers. // Variable is in a register, we need to check for clobbers.
if (isDbgValueInDefinedReg(MI)) if (isDbgValueInDefinedReg(&MI))
LiveUserVar[MI->getOperand(0).getReg()] = Var; LiveUserVar[MI.getOperand(0).getReg()] = Var;
// Check the history of this variable. // Check the history of this variable.
SmallVectorImpl<const MachineInstr *> &History = Result[Var]; SmallVectorImpl<const MachineInstr *> &History = Result[Var];
@ -84,14 +81,14 @@ void calculateDbgValueHistory(const MachineFunction *MF,
} }
} }
} }
History.push_back(MI); History.push_back(&MI);
} else { } else {
// Not a DBG_VALUE instruction. // Not a DBG_VALUE instruction.
if (!MI->isPosition()) if (!MI.isPosition())
AtBlockEntry = false; AtBlockEntry = false;
// Check if the instruction clobbers any registers with debug vars. // Check if the instruction clobbers any registers with debug vars.
for (const MachineOperand &MO : MI->operands()) { for (const MachineOperand &MO : MI.operands()) {
if (!MO.isReg() || !MO.isDef() || !MO.getReg()) if (!MO.isReg() || !MO.isDef() || !MO.getReg())
continue; continue;
for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid(); for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid();
@ -113,14 +110,14 @@ void calculateDbgValueHistory(const MachineFunction *MF,
const MachineInstr *Prev = History.back(); const MachineInstr *Prev = History.back();
// Sanity-check: Register assignments are terminated at the end of // Sanity-check: Register assignments are terminated at the end of
// their block. // their block.
if (!Prev->isDebugValue() || Prev->getParent() != MI->getParent()) if (!Prev->isDebugValue() || Prev->getParent() != MI.getParent())
continue; continue;
// Is the variable still in Reg? // Is the variable still in Reg?
if (!isDbgValueInDefinedReg(Prev) || if (!isDbgValueInDefinedReg(Prev) ||
Prev->getOperand(0).getReg() != Reg) Prev->getOperand(0).getReg() != Reg)
continue; continue;
// Var is clobbered. Make sure the next instruction gets a label. // Var is clobbered. Make sure the next instruction gets a label.
History.push_back(MI); History.push_back(&MI);
} }
} }
} }

16
lib/CodeGen/AsmPrinter/DwarfDebug.cpp
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@ -1441,23 +1441,21 @@ void DwarfDebug::beginFunction(const MachineFunction *MF) {
// Collect user variables, find the end of the prologue. // Collect user variables, find the end of the prologue.
for (const auto &MBB : *MF) { for (const auto &MBB : *MF) {
for (MachineBasicBlock::const_iterator II = MBB.begin(), IE = MBB.end(); for (const auto &MI : MBB) {
II != IE; ++II) { if (MI.isDebugValue()) {
const MachineInstr *MI = II; assert(MI.getNumOperands() > 1 && "Invalid machine instruction!");
if (MI->isDebugValue()) {
assert(MI->getNumOperands() > 1 && "Invalid machine instruction!");
// Keep track of user variables in order of appearance. Store the set // Keep track of user variables in order of appearance. Store the set
// of variables we've already seen as a set of keys in DbgValues. // of variables we've already seen as a set of keys in DbgValues.
const MDNode *Var = MI->getDebugVariable(); const MDNode *Var = MI.getDebugVariable();
auto IterPair = DbgValues.insert( auto IterPair = DbgValues.insert(
std::make_pair(Var, SmallVector<const MachineInstr *, 4>())); std::make_pair(Var, SmallVector<const MachineInstr *, 4>()));
if (IterPair.second) if (IterPair.second)
UserVariables.push_back(Var); UserVariables.push_back(Var);
} else if (!MI->getFlag(MachineInstr::FrameSetup) && } else if (!MI.getFlag(MachineInstr::FrameSetup) &&
PrologEndLoc.isUnknown() && !MI->getDebugLoc().isUnknown()) { PrologEndLoc.isUnknown() && !MI.getDebugLoc().isUnknown()) {
// First known non-DBG_VALUE and non-frame setup location marks // First known non-DBG_VALUE and non-frame setup location marks
// the beginning of the function body. // the beginning of the function body.
PrologEndLoc = MI->getDebugLoc(); PrologEndLoc = MI.getDebugLoc();
} }
} }
} }

11
lib/CodeGen/AsmPrinter/DwarfException.cpp
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@ -225,16 +225,15 @@ ComputeCallSiteTable(SmallVectorImpl<CallSiteEntry> &CallSites,
// Visit all instructions in order of address. // Visit all instructions in order of address.
for (const auto &MBB : *Asm->MF) { for (const auto &MBB : *Asm->MF) {
for (MachineBasicBlock::const_iterator MI = MBB.begin(), E = MBB.end(); for (const auto &MI : MBB) {
MI != E; ++MI) { if (!MI.isEHLabel()) {
if (!MI->isEHLabel()) { if (MI.isCall())
if (MI->isCall()) SawPotentiallyThrowing |= !CallToNoUnwindFunction(&MI);
SawPotentiallyThrowing |= !CallToNoUnwindFunction(MI);
continue; continue;
} }
// End of the previous try-range? // End of the previous try-range?
MCSymbol *BeginLabel = MI->getOperand(0).getMCSymbol(); MCSymbol *BeginLabel = MI.getOperand(0).getMCSymbol();
if (BeginLabel == LastLabel) if (BeginLabel == LastLabel)
SawPotentiallyThrowing = false; SawPotentiallyThrowing = false;

17
lib/CodeGen/AsmPrinter/WinCodeViewLineTables.cpp
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@ -277,20 +277,19 @@ void WinCodeViewLineTables::beginFunction(const MachineFunction *MF) {
// for the first instruction of the function, not the last of the prolog? // for the first instruction of the function, not the last of the prolog?
DebugLoc PrologEndLoc; DebugLoc PrologEndLoc;
bool EmptyPrologue = true; bool EmptyPrologue = true;
for (MachineFunction::const_iterator I = MF->begin(), E = MF->end(); for (const auto &MBB : *MF) {
I != E && PrologEndLoc.isUnknown(); ++I) { if (!PrologEndLoc.isUnknown())
for (MachineBasicBlock::const_iterator II = I->begin(), IE = I->end(); break;
II != IE; ++II) { for (const auto &MI : MBB) {
const MachineInstr *MI = II; if (MI.isDebugValue())
if (MI->isDebugValue())
continue; continue;
// First known non-DBG_VALUE and non-frame setup location marks // First known non-DBG_VALUE and non-frame setup location marks
// the beginning of the function body. // the beginning of the function body.
// FIXME: do we need the first subcondition? // FIXME: do we need the first subcondition?
if (!MI->getFlag(MachineInstr::FrameSetup) && if (!MI.getFlag(MachineInstr::FrameSetup) &&
(!MI->getDebugLoc().isUnknown())) { (!MI.getDebugLoc().isUnknown())) {
PrologEndLoc = MI->getDebugLoc(); PrologEndLoc = MI.getDebugLoc();
break; break;
} }
EmptyPrologue = false; EmptyPrologue = false;

17
lib/CodeGen/LexicalScopes.cpp
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@ -63,25 +63,22 @@ void LexicalScopes::extractLexicalScopes(
const MachineInstr *RangeBeginMI = nullptr; const MachineInstr *RangeBeginMI = nullptr;
const MachineInstr *PrevMI = nullptr; const MachineInstr *PrevMI = nullptr;
DebugLoc PrevDL; DebugLoc PrevDL;
for (MachineBasicBlock::const_iterator II = MBB.begin(), IE = MBB.end(); for (const auto &MInsn : MBB) {
II != IE; ++II) {
const MachineInstr *MInsn = II;
// Check if instruction has valid location information. // Check if instruction has valid location information.
const DebugLoc MIDL = MInsn->getDebugLoc(); const DebugLoc MIDL = MInsn.getDebugLoc();
if (MIDL.isUnknown()) { if (MIDL.isUnknown()) {
PrevMI = MInsn; PrevMI = &MInsn;
continue; continue;
} }
// If scope has not changed then skip this instruction. // If scope has not changed then skip this instruction.
if (MIDL == PrevDL) { if (MIDL == PrevDL) {
PrevMI = MInsn; PrevMI = &MInsn;
continue; continue;
} }
// Ignore DBG_VALUE. It does not contribute to any instruction in output. // Ignore DBG_VALUE. It does not contribute to any instruction in output.
if (MInsn->isDebugValue()) if (MInsn.isDebugValue())
continue; continue;
if (RangeBeginMI) { if (RangeBeginMI) {
@ -94,10 +91,10 @@ void LexicalScopes::extractLexicalScopes(
} }
// This is a beginning of a new instruction range. // This is a beginning of a new instruction range.
RangeBeginMI = MInsn; RangeBeginMI = &MInsn;
// Reset previous markers. // Reset previous markers.
PrevMI = MInsn; PrevMI = &MInsn;
PrevDL = MIDL; PrevDL = MIDL;
} }

14
lib/CodeGen/LiveVariables.cpp
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@ -702,12 +702,14 @@ void LiveVariables::removeVirtualRegistersKilled(MachineInstr *MI) {
/// ///
void LiveVariables::analyzePHINodes(const MachineFunction& Fn) { void LiveVariables::analyzePHINodes(const MachineFunction& Fn) {
for (const auto &MBB : Fn) for (const auto &MBB : Fn)
for (MachineBasicBlock::const_iterator BBI = MBB.begin(), BBE = MBB.end(); for (const auto &BBI : MBB) {
BBI != BBE && BBI->isPHI(); ++BBI) if (!BBI.isPHI())
for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) break;
if (BBI->getOperand(i).readsReg()) for (unsigned i = 1, e = BBI.getNumOperands(); i != e; i += 2)
PHIVarInfo[BBI->getOperand(i + 1).getMBB()->getNumber()] if (BBI.getOperand(i).readsReg())
.push_back(BBI->getOperand(i).getReg()); PHIVarInfo[BBI.getOperand(i + 1).getMBB()->getNumber()]
.push_back(BBI.getOperand(i).getReg());
}
} }
bool LiveVariables::VarInfo::isLiveIn(const MachineBasicBlock &MBB, bool LiveVariables::VarInfo::isLiveIn(const MachineBasicBlock &MBB,

50
lib/CodeGen/MachineTraceMetrics.cpp
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@ -97,19 +97,17 @@ MachineTraceMetrics::getResources(const MachineBasicBlock *MBB) {
unsigned PRKinds = SchedModel.getNumProcResourceKinds(); unsigned PRKinds = SchedModel.getNumProcResourceKinds();
SmallVector<unsigned, 32> PRCycles(PRKinds); SmallVector<unsigned, 32> PRCycles(PRKinds);
for (MachineBasicBlock::const_iterator I = MBB->begin(), E = MBB->end(); for (const auto &MI : *MBB) {
I != E; ++I) { if (MI.isTransient())
const MachineInstr *MI = I;
if (MI->isTransient())
continue; continue;
++InstrCount; ++InstrCount;
if (MI->isCall()) if (MI.isCall())
FBI->HasCalls = true; FBI->HasCalls = true;
// Count processor resources used. // Count processor resources used.
if (!SchedModel.hasInstrSchedModel()) if (!SchedModel.hasInstrSchedModel())
continue; continue;
const MCSchedClassDesc *SC = SchedModel.resolveSchedClass(MI); const MCSchedClassDesc *SC = SchedModel.resolveSchedClass(&MI);
if (!SC->isValid()) if (!SC->isValid())
continue; continue;
@ -570,9 +568,8 @@ MachineTraceMetrics::Ensemble::invalidate(const MachineBasicBlock *BadMBB) {
// invalidated, but their instructions will stay the same, so there is no // invalidated, but their instructions will stay the same, so there is no
// need to erase the Cycle entries. They will be overwritten when we // need to erase the Cycle entries. They will be overwritten when we
// recompute. // recompute.
for (MachineBasicBlock::const_iterator I = BadMBB->begin(), E = BadMBB->end(); for (const auto &I : *BadMBB)
I != E; ++I) Cycles.erase(&I);
Cycles.erase(I);
} }
void MachineTraceMetrics::Ensemble::verify() const { void MachineTraceMetrics::Ensemble::verify() const {
@ -830,16 +827,13 @@ computeInstrDepths(const MachineBasicBlock *MBB) {
if (TBI.HasValidInstrHeights) if (TBI.HasValidInstrHeights)
TBI.CriticalPath = computeCrossBlockCriticalPath(TBI); TBI.CriticalPath = computeCrossBlockCriticalPath(TBI);
for (MachineBasicBlock::const_iterator I = MBB->begin(), E = MBB->end(); for (const auto &UseMI : *MBB) {
I != E; ++I) {
const MachineInstr *UseMI = I;
// Collect all data dependencies. // Collect all data dependencies.
Deps.clear(); Deps.clear();
if (UseMI->isPHI()) if (UseMI.isPHI())
getPHIDeps(UseMI, Deps, TBI.Pred, MTM.MRI); getPHIDeps(&UseMI, Deps, TBI.Pred, MTM.MRI);
else if (getDataDeps(UseMI, Deps, MTM.MRI)) else if (getDataDeps(&UseMI, Deps, MTM.MRI))
updatePhysDepsDownwards(UseMI, Deps, RegUnits, MTM.TRI); updatePhysDepsDownwards(&UseMI, Deps, RegUnits, MTM.TRI);
// Filter and process dependencies, computing the earliest issue cycle. // Filter and process dependencies, computing the earliest issue cycle.
unsigned Cycle = 0; unsigned Cycle = 0;
@ -855,20 +849,20 @@ computeInstrDepths(const MachineBasicBlock *MBB) {
// Add latency if DefMI is a real instruction. Transients get latency 0. // Add latency if DefMI is a real instruction. Transients get latency 0.
if (!Dep.DefMI->isTransient()) if (!Dep.DefMI->isTransient())
DepCycle += MTM.SchedModel DepCycle += MTM.SchedModel
.computeOperandLatency(Dep.DefMI, Dep.DefOp, UseMI, Dep.UseOp); .computeOperandLatency(Dep.DefMI, Dep.DefOp, &UseMI, Dep.UseOp);
Cycle = std::max(Cycle, DepCycle); Cycle = std::max(Cycle, DepCycle);
} }
// Remember the instruction depth. // Remember the instruction depth.
InstrCycles &MICycles = Cycles[UseMI]; InstrCycles &MICycles = Cycles[&UseMI];
MICycles.Depth = Cycle; MICycles.Depth = Cycle;
if (!TBI.HasValidInstrHeights) { if (!TBI.HasValidInstrHeights) {
DEBUG(dbgs() << Cycle << '\t' << *UseMI); DEBUG(dbgs() << Cycle << '\t' << UseMI);
continue; continue;
} }
// Update critical path length. // Update critical path length.
TBI.CriticalPath = std::max(TBI.CriticalPath, Cycle + MICycles.Height); TBI.CriticalPath = std::max(TBI.CriticalPath, Cycle + MICycles.Height);
DEBUG(dbgs() << TBI.CriticalPath << '\t' << Cycle << '\t' << *UseMI); DEBUG(dbgs() << TBI.CriticalPath << '\t' << Cycle << '\t' << UseMI);
} }
} }
} }
@ -1057,16 +1051,16 @@ computeInstrHeights(const MachineBasicBlock *MBB) {
Succ = Loop->getHeader(); Succ = Loop->getHeader();
if (Succ) { if (Succ) {
for (MachineBasicBlock::const_iterator I = Succ->begin(), E = Succ->end(); for (const auto &PHI : *Succ) {
I != E && I->isPHI(); ++I) { if (!PHI.isPHI())
const MachineInstr *PHI = I; break;
Deps.clear(); Deps.clear();
getPHIDeps(PHI, Deps, MBB, MTM.MRI); getPHIDeps(&PHI, Deps, MBB, MTM.MRI);
if (!Deps.empty()) { if (!Deps.empty()) {
// Loop header PHI heights are all 0. // Loop header PHI heights are all 0.
unsigned Height = TBI.Succ ? Cycles.lookup(PHI).Height : 0; unsigned Height = TBI.Succ ? Cycles.lookup(&PHI).Height : 0;
DEBUG(dbgs() << "pred\t" << Height << '\t' << *PHI); DEBUG(dbgs() << "pred\t" << Height << '\t' << PHI);
if (pushDepHeight(Deps.front(), PHI, Height, if (pushDepHeight(Deps.front(), &PHI, Height,
Heights, MTM.SchedModel, MTM.TII)) Heights, MTM.SchedModel, MTM.TII))
addLiveIns(Deps.front().DefMI, Deps.front().DefOp, Stack); addLiveIns(Deps.front().DefMI, Deps.front().DefOp, Stack);
} }

32
lib/CodeGen/MachineVerifier.cpp
View File

@ -1224,27 +1224,28 @@ void MachineVerifier::calcRegsRequired() {
// calcRegsPassed has been run so BBInfo::isLiveOut is valid. // calcRegsPassed has been run so BBInfo::isLiveOut is valid.
void MachineVerifier::checkPHIOps(const MachineBasicBlock *MBB) { void MachineVerifier::checkPHIOps(const MachineBasicBlock *MBB) {
SmallPtrSet<const MachineBasicBlock*, 8> seen; SmallPtrSet<const MachineBasicBlock*, 8> seen;
for (MachineBasicBlock::const_iterator BBI = MBB->begin(), BBE = MBB->end(); for (const auto &BBI : *MBB) {
BBI != BBE && BBI->isPHI(); ++BBI) { if (!BBI.isPHI())
break;
seen.clear(); seen.clear();
for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) { for (unsigned i = 1, e = BBI.getNumOperands(); i != e; i += 2) {
unsigned Reg = BBI->getOperand(i).getReg(); unsigned Reg = BBI.getOperand(i).getReg();
const MachineBasicBlock *Pre = BBI->getOperand(i + 1).getMBB(); const MachineBasicBlock *Pre = BBI.getOperand(i + 1).getMBB();
if (!Pre->isSuccessor(MBB)) if (!Pre->isSuccessor(MBB))
continue; continue;
seen.insert(Pre); seen.insert(Pre);
BBInfo &PrInfo = MBBInfoMap[Pre]; BBInfo &PrInfo = MBBInfoMap[Pre];
if (PrInfo.reachable && !PrInfo.isLiveOut(Reg)) if (PrInfo.reachable && !PrInfo.isLiveOut(Reg))
report("PHI operand is not live-out from predecessor", report("PHI operand is not live-out from predecessor",
&BBI->getOperand(i), i); &BBI.getOperand(i), i);
} }
// Did we see all predecessors? // Did we see all predecessors?
for (MachineBasicBlock::const_pred_iterator PrI = MBB->pred_begin(), for (MachineBasicBlock::const_pred_iterator PrI = MBB->pred_begin(),
PrE = MBB->pred_end(); PrI != PrE; ++PrI) { PrE = MBB->pred_end(); PrI != PrE; ++PrI) {
if (!seen.count(*PrI)) { if (!seen.count(*PrI)) {
report("Missing PHI operand", BBI); report("Missing PHI operand", &BBI);
*OS << "BB#" << (*PrI)->getNumber() *OS << "BB#" << (*PrI)->getNumber()
<< " is a predecessor according to the CFG.\n"; << " is a predecessor according to the CFG.\n";
} }
@ -1668,32 +1669,31 @@ void MachineVerifier::verifyStackFrame() {
} }
// Update stack state by checking contents of MBB. // Update stack state by checking contents of MBB.
for (MachineBasicBlock::const_iterator I = MBB->begin(), E = MBB->end(); for (const auto &I : *MBB) {
I != E; ++I) { if (I.getOpcode() == FrameSetupOpcode) {
if (I->getOpcode() == FrameSetupOpcode) {
// The first operand of a FrameOpcode should be i32. // The first operand of a FrameOpcode should be i32.
int Size = I->getOperand(0).getImm(); int Size = I.getOperand(0).getImm();
assert(Size >= 0 && assert(Size >= 0 &&
"Value should be non-negative in FrameSetup and FrameDestroy.\n"); "Value should be non-negative in FrameSetup and FrameDestroy.\n");
if (BBState.ExitIsSetup) if (BBState.ExitIsSetup)
report("FrameSetup is after another FrameSetup", I); report("FrameSetup is after another FrameSetup", &I);
BBState.ExitValue -= Size; BBState.ExitValue -= Size;
BBState.ExitIsSetup = true; BBState.ExitIsSetup = true;
} }
if (I->getOpcode() == FrameDestroyOpcode) { if (I.getOpcode() == FrameDestroyOpcode) {
// The first operand of a FrameOpcode should be i32. // The first operand of a FrameOpcode should be i32.
int Size = I->getOperand(0).getImm(); int Size = I.getOperand(0).getImm();
assert(Size >= 0 && assert(Size >= 0 &&
"Value should be non-negative in FrameSetup and FrameDestroy.\n"); "Value should be non-negative in FrameSetup and FrameDestroy.\n");
if (!BBState.ExitIsSetup) if (!BBState.ExitIsSetup)
report("FrameDestroy is not after a FrameSetup", I); report("FrameDestroy is not after a FrameSetup", &I);
int AbsSPAdj = BBState.ExitValue < 0 ? -BBState.ExitValue : int AbsSPAdj = BBState.ExitValue < 0 ? -BBState.ExitValue :
BBState.ExitValue; BBState.ExitValue;
if (BBState.ExitIsSetup && AbsSPAdj != Size) { if (BBState.ExitIsSetup && AbsSPAdj != Size) {
report("FrameDestroy <n> is after FrameSetup <m>", I); report("FrameDestroy <n> is after FrameSetup <m>", &I);
*OS << "FrameDestroy <" << Size << "> is after FrameSetup <" *OS << "FrameDestroy <" << Size << "> is after FrameSetup <"
<< AbsSPAdj << ">.\n"; << AbsSPAdj << ">.\n";
} }

12
lib/CodeGen/PHIElimination.cpp
View File

@ -533,11 +533,13 @@ void PHIElimination::LowerPHINode(MachineBasicBlock &MBB,
/// ///
void PHIElimination::analyzePHINodes(const MachineFunction& MF) { void PHIElimination::analyzePHINodes(const MachineFunction& MF) {
for (const auto &MBB : MF) for (const auto &MBB : MF)
for (MachineBasicBlock::const_iterator BBI = MBB.begin(), BBE = MBB.end(); for (const auto &BBI : MBB) {
BBI != BBE && BBI->isPHI(); ++BBI) if (!BBI.isPHI())
for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) break;
++VRegPHIUseCount[BBVRegPair(BBI->getOperand(i+1).getMBB()->getNumber(), for (unsigned i = 1, e = BBI.getNumOperands(); i != e; i += 2)
BBI->getOperand(i).getReg())]; ++VRegPHIUseCount[BBVRegPair(BBI.getOperand(i+1).getMBB()->getNumber(),
BBI.getOperand(i).getReg())];
}
} }
bool PHIElimination::SplitPHIEdges(MachineFunction &MF, bool PHIElimination::SplitPHIEdges(MachineFunction &MF,

16
lib/CodeGen/RegAllocPBQP.cpp
View File

@ -321,17 +321,9 @@ PBQPRAProblem *PBQPBuilderWithCoalescing::build(MachineFunction *mf,
// Scan the machine function and add a coalescing cost whenever CoalescerPair // Scan the machine function and add a coalescing cost whenever CoalescerPair
// gives the Ok. // gives the Ok.
for (MachineFunction::const_iterator mbbItr = mf->begin(), for (const auto &mbb : *mf) {
mbbEnd = mf->end(); for (const auto &mi : mbb) {
mbbItr != mbbEnd; ++mbbItr) { if (!cp.setRegisters(&mi)) {
const MachineBasicBlock *mbb = &*mbbItr;
for (MachineBasicBlock::const_iterator miItr = mbb->begin(),
miEnd = mbb->end();
miItr != miEnd; ++miItr) {
const MachineInstr *mi = &*miItr;
if (!cp.setRegisters(mi)) {
continue; // Not coalescable. continue; // Not coalescable.
} }
@ -346,7 +338,7 @@ PBQPRAProblem *PBQPBuilderWithCoalescing::build(MachineFunction *mf,
// value plucked randomly out of the air. // value plucked randomly out of the air.
PBQP::PBQPNum cBenefit = PBQP::PBQPNum cBenefit =
copyFactor * LiveIntervals::getSpillWeight(false, true, mbfi, mi); copyFactor * LiveIntervals::getSpillWeight(false, true, mbfi, &mi);
if (cp.isPhys()) { if (cp.isPhys()) {
if (!mf->getRegInfo().isAllocatable(dst)) { if (!mf->getRegInfo().isAllocatable(dst)) {

5
lib/CodeGen/RegisterCoalescer.cpp
View File

@ -241,9 +241,8 @@ static bool isSplitEdge(const MachineBasicBlock *MBB) {
if (MBB->pred_size() != 1 || MBB->succ_size() != 1) if (MBB->pred_size() != 1 || MBB->succ_size() != 1)
return false; return false;
for (MachineBasicBlock::const_iterator MII = MBB->begin(), E = MBB->end(); for (const auto &MI : *MBB) {
MII != E; ++MII) { if (!MI.isCopyLike() && !MI.isUnconditionalBranch())
if (!MII->isCopyLike() && !MII->isUnconditionalBranch())
return false; return false;
} }
return true; return true;

14
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
View File

@ -510,21 +510,17 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
// Determine if there are any calls in this machine function. // Determine if there are any calls in this machine function.
MachineFrameInfo *MFI = MF->getFrameInfo(); MachineFrameInfo *MFI = MF->getFrameInfo();
for (MachineFunction::const_iterator I = MF->begin(), E = MF->end(); I != E; for (const auto &MBB : *MF) {
++I) {
if (MFI->hasCalls() && MF->hasInlineAsm()) if (MFI->hasCalls() && MF->hasInlineAsm())
break; break;
const MachineBasicBlock *MBB = I; for (const auto &MI : MBB) {
for (MachineBasicBlock::const_iterator II = MBB->begin(), IE = MBB->end(); const MCInstrDesc &MCID = TM.getInstrInfo()->get(MI.getOpcode());
II != IE; ++II) {
const MCInstrDesc &MCID = TM.getInstrInfo()->get(II->getOpcode());
if ((MCID.isCall() && !MCID.isReturn()) || if ((MCID.isCall() && !MCID.isReturn()) ||
II->isStackAligningInlineAsm()) { MI.isStackAligningInlineAsm()) {
MFI->setHasCalls(true); MFI->setHasCalls(true);
} }
if (II->isInlineAsm()) { if (MI.isInlineAsm()) {
MF->setHasInlineAsm(true); MF->setHasInlineAsm(true);
} }
} }

4
lib/CodeGen/TailDuplication.cpp
View File

@ -364,9 +364,7 @@ static unsigned getPHISrcRegOpIdx(MachineInstr *MI, MachineBasicBlock *SrcBB) {
// block (which is why we need to copy the information). // block (which is why we need to copy the information).
static void getRegsUsedByPHIs(const MachineBasicBlock &BB, static void getRegsUsedByPHIs(const MachineBasicBlock &BB,
DenseSet<unsigned> *UsedByPhi) { DenseSet<unsigned> *UsedByPhi) {
for(MachineBasicBlock::const_iterator I = BB.begin(), E = BB.end(); for (const auto &MI : BB) {
I != E; ++I) {
const MachineInstr &MI = *I;
if (!MI.isPHI()) if (!MI.isPHI())
break; break;
for (unsigned i = 1, e = MI.getNumOperands(); i != e; i += 2) { for (unsigned i = 1, e = MI.getNumOperands(); i != e; i += 2) {