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Code Issues Projects Releases Wiki Activity

Convert more loops to range-based equivalents

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207714 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Alexey Samsonov 2014-04-30 22:17:38 +00:00
parent fff0879df0
commit 846781235d
13 changed files with 103 additions and 130 deletions
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25
lib/CodeGen/AsmPrinter/DbgValueHistoryCalculator.cpp
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@ -36,19 +36,16 @@ void calculateDbgValueHistory(const MachineFunction *MF,
for (MachineFunction::const_iterator I = MF->begin(), E = MF->end(); I != E;
++I) {
bool AtBlockEntry = true;
for (MachineBasicBlock::const_iterator II = I->begin(), IE = I->end();
II != IE; ++II) {
const MachineInstr *MI = II;
if (MI->isDebugValue()) {
assert(MI->getNumOperands() > 1 && "Invalid machine instruction!");
for (const auto &MI : *I) {
if (MI.isDebugValue()) {
assert(MI.getNumOperands() > 1 && "Invalid machine instruction!");
// Keep track of user variables.
const MDNode *Var = MI->getDebugVariable();
const MDNode *Var = MI.getDebugVariable();
// Variable is in a register, we need to check for clobbers.
if (isDbgValueInDefinedReg(MI))
LiveUserVar[MI->getOperand(0).getReg()] = Var;
if (isDbgValueInDefinedReg(&MI))
LiveUserVar[MI.getOperand(0).getReg()] = Var;
// Check the history of this variable.
SmallVectorImpl<const MachineInstr *> &History = Result[Var];
@ -84,14 +81,14 @@ void calculateDbgValueHistory(const MachineFunction *MF,
}
}
}
History.push_back(MI);
History.push_back(&MI);
} else {
// Not a DBG_VALUE instruction.
if (!MI->isPosition())
if (!MI.isPosition())
AtBlockEntry = false;
// Check if the instruction clobbers any registers with debug vars.
for (const MachineOperand &MO : MI->operands()) {
for (const MachineOperand &MO : MI.operands()) {
if (!MO.isReg() || !MO.isDef() || !MO.getReg())
continue;
for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid();
@ -113,14 +110,14 @@ void calculateDbgValueHistory(const MachineFunction *MF,
const MachineInstr *Prev = History.back();
// Sanity-check: Register assignments are terminated at the end of
// their block.
if (!Prev->isDebugValue() || Prev->getParent() != MI->getParent())
if (!Prev->isDebugValue() || Prev->getParent() != MI.getParent())
continue;
// Is the variable still in Reg?
if (!isDbgValueInDefinedReg(Prev) ||
Prev->getOperand(0).getReg() != Reg)
continue;
// Var is clobbered. Make sure the next instruction gets a label.
History.push_back(MI);
History.push_back(&MI);
}
}
}

16
lib/CodeGen/AsmPrinter/DwarfDebug.cpp
View File

@ -1441,23 +1441,21 @@ void DwarfDebug::beginFunction(const MachineFunction *MF) {
// Collect user variables, find the end of the prologue.
for (const auto &MBB : *MF) {
for (MachineBasicBlock::const_iterator II = MBB.begin(), IE = MBB.end();
II != IE; ++II) {
const MachineInstr *MI = II;
if (MI->isDebugValue()) {
assert(MI->getNumOperands() > 1 && "Invalid machine instruction!");
for (const auto &MI : MBB) {
if (MI.isDebugValue()) {
assert(MI.getNumOperands() > 1 && "Invalid machine instruction!");
// Keep track of user variables in order of appearance. Store the set
// of variables we've already seen as a set of keys in DbgValues.
const MDNode *Var = MI->getDebugVariable();
const MDNode *Var = MI.getDebugVariable();
auto IterPair = DbgValues.insert(
std::make_pair(Var, SmallVector<const MachineInstr *, 4>()));
if (IterPair.second)
UserVariables.push_back(Var);
} else if (!MI->getFlag(MachineInstr::FrameSetup) &&
PrologEndLoc.isUnknown() && !MI->getDebugLoc().isUnknown()) {
} else if (!MI.getFlag(MachineInstr::FrameSetup) &&
PrologEndLoc.isUnknown() && !MI.getDebugLoc().isUnknown()) {
// First known non-DBG_VALUE and non-frame setup location marks
// the beginning of the function body.
PrologEndLoc = MI->getDebugLoc();
PrologEndLoc = MI.getDebugLoc();
}
}
}

11
lib/CodeGen/AsmPrinter/DwarfException.cpp
View File

@ -225,16 +225,15 @@ ComputeCallSiteTable(SmallVectorImpl<CallSiteEntry> &CallSites,
// Visit all instructions in order of address.
for (const auto &MBB : *Asm->MF) {
for (MachineBasicBlock::const_iterator MI = MBB.begin(), E = MBB.end();
MI != E; ++MI) {
if (!MI->isEHLabel()) {
if (MI->isCall())
SawPotentiallyThrowing |= !CallToNoUnwindFunction(MI);
for (const auto &MI : MBB) {
if (!MI.isEHLabel()) {
if (MI.isCall())
SawPotentiallyThrowing |= !CallToNoUnwindFunction(&MI);
continue;
}
// End of the previous try-range?
MCSymbol *BeginLabel = MI->getOperand(0).getMCSymbol();
MCSymbol *BeginLabel = MI.getOperand(0).getMCSymbol();
if (BeginLabel == LastLabel)
SawPotentiallyThrowing = false;

17
lib/CodeGen/AsmPrinter/WinCodeViewLineTables.cpp
View File

@ -277,20 +277,19 @@ void WinCodeViewLineTables::beginFunction(const MachineFunction *MF) {
// for the first instruction of the function, not the last of the prolog?
DebugLoc PrologEndLoc;
bool EmptyPrologue = true;
for (MachineFunction::const_iterator I = MF->begin(), E = MF->end();
I != E && PrologEndLoc.isUnknown(); ++I) {
for (MachineBasicBlock::const_iterator II = I->begin(), IE = I->end();
II != IE; ++II) {
const MachineInstr *MI = II;
if (MI->isDebugValue())
for (const auto &MBB : *MF) {
if (!PrologEndLoc.isUnknown())
break;
for (const auto &MI : MBB) {
if (MI.isDebugValue())
continue;
// First known non-DBG_VALUE and non-frame setup location marks
// the beginning of the function body.
// FIXME: do we need the first subcondition?
if (!MI->getFlag(MachineInstr::FrameSetup) &&
(!MI->getDebugLoc().isUnknown())) {
PrologEndLoc = MI->getDebugLoc();
if (!MI.getFlag(MachineInstr::FrameSetup) &&
(!MI.getDebugLoc().isUnknown())) {
PrologEndLoc = MI.getDebugLoc();
break;
}
EmptyPrologue = false;

17
lib/CodeGen/LexicalScopes.cpp
View File

@ -63,25 +63,22 @@ void LexicalScopes::extractLexicalScopes(
const MachineInstr *RangeBeginMI = nullptr;
const MachineInstr *PrevMI = nullptr;
DebugLoc PrevDL;
for (MachineBasicBlock::const_iterator II = MBB.begin(), IE = MBB.end();
II != IE; ++II) {
const MachineInstr *MInsn = II;
for (const auto &MInsn : MBB) {
// Check if instruction has valid location information.
const DebugLoc MIDL = MInsn->getDebugLoc();
const DebugLoc MIDL = MInsn.getDebugLoc();
if (MIDL.isUnknown()) {
PrevMI = MInsn;
PrevMI = &MInsn;
continue;
}
// If scope has not changed then skip this instruction.
if (MIDL == PrevDL) {
PrevMI = MInsn;
PrevMI = &MInsn;
continue;
}
// Ignore DBG_VALUE. It does not contribute to any instruction in output.
if (MInsn->isDebugValue())
if (MInsn.isDebugValue())
continue;
if (RangeBeginMI) {
@ -94,10 +91,10 @@ void LexicalScopes::extractLexicalScopes(
}
// This is a beginning of a new instruction range.
RangeBeginMI = MInsn;
RangeBeginMI = &MInsn;
// Reset previous markers.
PrevMI = MInsn;
PrevMI = &MInsn;
PrevDL = MIDL;
}

14
lib/CodeGen/LiveVariables.cpp
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@ -702,12 +702,14 @@ void LiveVariables::removeVirtualRegistersKilled(MachineInstr *MI) {
///
void LiveVariables::analyzePHINodes(const MachineFunction& Fn) {
for (const auto &MBB : Fn)
for (MachineBasicBlock::const_iterator BBI = MBB.begin(), BBE = MBB.end();
BBI != BBE && BBI->isPHI(); ++BBI)
for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
if (BBI->getOperand(i).readsReg())
PHIVarInfo[BBI->getOperand(i + 1).getMBB()->getNumber()]
.push_back(BBI->getOperand(i).getReg());
for (const auto &BBI : MBB) {
if (!BBI.isPHI())
break;
for (unsigned i = 1, e = BBI.getNumOperands(); i != e; i += 2)
if (BBI.getOperand(i).readsReg())
PHIVarInfo[BBI.getOperand(i + 1).getMBB()->getNumber()]
.push_back(BBI.getOperand(i).getReg());
}
}
bool LiveVariables::VarInfo::isLiveIn(const MachineBasicBlock &MBB,

50
lib/CodeGen/MachineTraceMetrics.cpp
View File

@ -97,19 +97,17 @@ MachineTraceMetrics::getResources(const MachineBasicBlock *MBB) {
unsigned PRKinds = SchedModel.getNumProcResourceKinds();
SmallVector<unsigned, 32> PRCycles(PRKinds);
for (MachineBasicBlock::const_iterator I = MBB->begin(), E = MBB->end();
I != E; ++I) {
const MachineInstr *MI = I;
if (MI->isTransient())
for (const auto &MI : *MBB) {
if (MI.isTransient())
continue;
++InstrCount;
if (MI->isCall())
if (MI.isCall())
FBI->HasCalls = true;
// Count processor resources used.
if (!SchedModel.hasInstrSchedModel())
continue;
const MCSchedClassDesc *SC = SchedModel.resolveSchedClass(MI);
const MCSchedClassDesc *SC = SchedModel.resolveSchedClass(&MI);
if (!SC->isValid())
continue;
@ -570,9 +568,8 @@ MachineTraceMetrics::Ensemble::invalidate(const MachineBasicBlock *BadMBB) {
// invalidated, but their instructions will stay the same, so there is no
// need to erase the Cycle entries. They will be overwritten when we
// recompute.
for (MachineBasicBlock::const_iterator I = BadMBB->begin(), E = BadMBB->end();
I != E; ++I)
Cycles.erase(I);
for (const auto &I : *BadMBB)
Cycles.erase(&I);
}
void MachineTraceMetrics::Ensemble::verify() const {
@ -830,16 +827,13 @@ computeInstrDepths(const MachineBasicBlock *MBB) {
if (TBI.HasValidInstrHeights)
TBI.CriticalPath = computeCrossBlockCriticalPath(TBI);
for (MachineBasicBlock::const_iterator I = MBB->begin(), E = MBB->end();
I != E; ++I) {
const MachineInstr *UseMI = I;
for (const auto &UseMI : *MBB) {
// Collect all data dependencies.
Deps.clear();
if (UseMI->isPHI())
getPHIDeps(UseMI, Deps, TBI.Pred, MTM.MRI);
else if (getDataDeps(UseMI, Deps, MTM.MRI))
updatePhysDepsDownwards(UseMI, Deps, RegUnits, MTM.TRI);
if (UseMI.isPHI())
getPHIDeps(&UseMI, Deps, TBI.Pred, MTM.MRI);
else if (getDataDeps(&UseMI, Deps, MTM.MRI))
updatePhysDepsDownwards(&UseMI, Deps, RegUnits, MTM.TRI);
// Filter and process dependencies, computing the earliest issue cycle.
unsigned Cycle = 0;
@ -855,20 +849,20 @@ computeInstrDepths(const MachineBasicBlock *MBB) {
// Add latency if DefMI is a real instruction. Transients get latency 0.
if (!Dep.DefMI->isTransient())
DepCycle += MTM.SchedModel
.computeOperandLatency(Dep.DefMI, Dep.DefOp, UseMI, Dep.UseOp);
.computeOperandLatency(Dep.DefMI, Dep.DefOp, &UseMI, Dep.UseOp);
Cycle = std::max(Cycle, DepCycle);
}
// Remember the instruction depth.
InstrCycles &MICycles = Cycles[UseMI];
InstrCycles &MICycles = Cycles[&UseMI];
MICycles.Depth = Cycle;
if (!TBI.HasValidInstrHeights) {
DEBUG(dbgs() << Cycle << '\t' << *UseMI);
DEBUG(dbgs() << Cycle << '\t' << UseMI);
continue;
}
// Update critical path length.
TBI.CriticalPath = std::max(TBI.CriticalPath, Cycle + MICycles.Height);
DEBUG(dbgs() << TBI.CriticalPath << '\t' << Cycle << '\t' << *UseMI);
DEBUG(dbgs() << TBI.CriticalPath << '\t' << Cycle << '\t' << UseMI);
}
}
}
@ -1057,16 +1051,16 @@ computeInstrHeights(const MachineBasicBlock *MBB) {
Succ = Loop->getHeader();
if (Succ) {
for (MachineBasicBlock::const_iterator I = Succ->begin(), E = Succ->end();
I != E && I->isPHI(); ++I) {
const MachineInstr *PHI = I;
for (const auto &PHI : *Succ) {
if (!PHI.isPHI())
break;
Deps.clear();
getPHIDeps(PHI, Deps, MBB, MTM.MRI);
getPHIDeps(&PHI, Deps, MBB, MTM.MRI);
if (!Deps.empty()) {
// Loop header PHI heights are all 0.
unsigned Height = TBI.Succ ? Cycles.lookup(PHI).Height : 0;
DEBUG(dbgs() << "pred\t" << Height << '\t' << *PHI);
if (pushDepHeight(Deps.front(), PHI, Height,
unsigned Height = TBI.Succ ? Cycles.lookup(&PHI).Height : 0;
DEBUG(dbgs() << "pred\t" << Height << '\t' << PHI);
if (pushDepHeight(Deps.front(), &PHI, Height,
Heights, MTM.SchedModel, MTM.TII))
addLiveIns(Deps.front().DefMI, Deps.front().DefOp, Stack);
}

32
lib/CodeGen/MachineVerifier.cpp
View File

@ -1224,27 +1224,28 @@ void MachineVerifier::calcRegsRequired() {
// calcRegsPassed has been run so BBInfo::isLiveOut is valid.
void MachineVerifier::checkPHIOps(const MachineBasicBlock *MBB) {
SmallPtrSet<const MachineBasicBlock*, 8> seen;
for (MachineBasicBlock::const_iterator BBI = MBB->begin(), BBE = MBB->end();
BBI != BBE && BBI->isPHI(); ++BBI) {
for (const auto &BBI : *MBB) {
if (!BBI.isPHI())
break;
seen.clear();
for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) {
unsigned Reg = BBI->getOperand(i).getReg();
const MachineBasicBlock *Pre = BBI->getOperand(i + 1).getMBB();
for (unsigned i = 1, e = BBI.getNumOperands(); i != e; i += 2) {
unsigned Reg = BBI.getOperand(i).getReg();
const MachineBasicBlock *Pre = BBI.getOperand(i + 1).getMBB();
if (!Pre->isSuccessor(MBB))
continue;
seen.insert(Pre);
BBInfo &PrInfo = MBBInfoMap[Pre];
if (PrInfo.reachable && !PrInfo.isLiveOut(Reg))
report("PHI operand is not live-out from predecessor",
&BBI->getOperand(i), i);
&BBI.getOperand(i), i);
}
// Did we see all predecessors?
for (MachineBasicBlock::const_pred_iterator PrI = MBB->pred_begin(),
PrE = MBB->pred_end(); PrI != PrE; ++PrI) {
if (!seen.count(*PrI)) {
report("Missing PHI operand", BBI);
report("Missing PHI operand", &BBI);
*OS << "BB#" << (*PrI)->getNumber()
<< " is a predecessor according to the CFG.\n";
}
@ -1668,32 +1669,31 @@ void MachineVerifier::verifyStackFrame() {
}
// Update stack state by checking contents of MBB.
for (MachineBasicBlock::const_iterator I = MBB->begin(), E = MBB->end();
I != E; ++I) {
if (I->getOpcode() == FrameSetupOpcode) {
for (const auto &I : *MBB) {
if (I.getOpcode() == FrameSetupOpcode) {
// The first operand of a FrameOpcode should be i32.
int Size = I->getOperand(0).getImm();
int Size = I.getOperand(0).getImm();
assert(Size >= 0 &&
"Value should be non-negative in FrameSetup and FrameDestroy.\n");
if (BBState.ExitIsSetup)
report("FrameSetup is after another FrameSetup", I);
report("FrameSetup is after another FrameSetup", &I);
BBState.ExitValue -= Size;
BBState.ExitIsSetup = true;
}
if (I->getOpcode() == FrameDestroyOpcode) {
if (I.getOpcode() == FrameDestroyOpcode) {
// The first operand of a FrameOpcode should be i32.
int Size = I->getOperand(0).getImm();
int Size = I.getOperand(0).getImm();
assert(Size >= 0 &&
"Value should be non-negative in FrameSetup and FrameDestroy.\n");
if (!BBState.ExitIsSetup)
report("FrameDestroy is not after a FrameSetup", I);
report("FrameDestroy is not after a FrameSetup", &I);
int AbsSPAdj = BBState.ExitValue < 0 ? -BBState.ExitValue :
BBState.ExitValue;
if (BBState.ExitIsSetup && AbsSPAdj != Size) {
report("FrameDestroy <n> is after FrameSetup <m>", I);
report("FrameDestroy <n> is after FrameSetup <m>", &I);
*OS << "FrameDestroy <" << Size << "> is after FrameSetup <"
<< AbsSPAdj << ">.\n";
}

12
lib/CodeGen/PHIElimination.cpp
View File

@ -533,11 +533,13 @@ void PHIElimination::LowerPHINode(MachineBasicBlock &MBB,
///
void PHIElimination::analyzePHINodes(const MachineFunction& MF) {
for (const auto &MBB : MF)
for (MachineBasicBlock::const_iterator BBI = MBB.begin(), BBE = MBB.end();
BBI != BBE && BBI->isPHI(); ++BBI)
for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
++VRegPHIUseCount[BBVRegPair(BBI->getOperand(i+1).getMBB()->getNumber(),
BBI->getOperand(i).getReg())];
for (const auto &BBI : MBB) {
if (!BBI.isPHI())
break;
for (unsigned i = 1, e = BBI.getNumOperands(); i != e; i += 2)
++VRegPHIUseCount[BBVRegPair(BBI.getOperand(i+1).getMBB()->getNumber(),
BBI.getOperand(i).getReg())];
}
}
bool PHIElimination::SplitPHIEdges(MachineFunction &MF,

16
lib/CodeGen/RegAllocPBQP.cpp
View File

@ -321,17 +321,9 @@ PBQPRAProblem *PBQPBuilderWithCoalescing::build(MachineFunction *mf,
// Scan the machine function and add a coalescing cost whenever CoalescerPair
// gives the Ok.
for (MachineFunction::const_iterator mbbItr = mf->begin(),
mbbEnd = mf->end();
mbbItr != mbbEnd; ++mbbItr) {
const MachineBasicBlock *mbb = &*mbbItr;
for (MachineBasicBlock::const_iterator miItr = mbb->begin(),
miEnd = mbb->end();
miItr != miEnd; ++miItr) {
const MachineInstr *mi = &*miItr;
if (!cp.setRegisters(mi)) {
for (const auto &mbb : *mf) {
for (const auto &mi : mbb) {
if (!cp.setRegisters(&mi)) {
continue; // Not coalescable.
}
@ -346,7 +338,7 @@ PBQPRAProblem *PBQPBuilderWithCoalescing::build(MachineFunction *mf,
// value plucked randomly out of the air.
PBQP::PBQPNum cBenefit =
copyFactor * LiveIntervals::getSpillWeight(false, true, mbfi, mi);
copyFactor * LiveIntervals::getSpillWeight(false, true, mbfi, &mi);
if (cp.isPhys()) {
if (!mf->getRegInfo().isAllocatable(dst)) {

5
lib/CodeGen/RegisterCoalescer.cpp
View File

@ -241,9 +241,8 @@ static bool isSplitEdge(const MachineBasicBlock *MBB) {
if (MBB->pred_size() != 1 || MBB->succ_size() != 1)
return false;
for (MachineBasicBlock::const_iterator MII = MBB->begin(), E = MBB->end();
MII != E; ++MII) {
if (!MII->isCopyLike() && !MII->isUnconditionalBranch())
for (const auto &MI : *MBB) {
if (!MI.isCopyLike() && !MI.isUnconditionalBranch())
return false;
}
return true;

14
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
View File

@ -510,21 +510,17 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
// Determine if there are any calls in this machine function.
MachineFrameInfo *MFI = MF->getFrameInfo();
for (MachineFunction::const_iterator I = MF->begin(), E = MF->end(); I != E;
++I) {
for (const auto &MBB : *MF) {
if (MFI->hasCalls() && MF->hasInlineAsm())
break;
const MachineBasicBlock *MBB = I;
for (MachineBasicBlock::const_iterator II = MBB->begin(), IE = MBB->end();
II != IE; ++II) {
const MCInstrDesc &MCID = TM.getInstrInfo()->get(II->getOpcode());
for (const auto &MI : MBB) {
const MCInstrDesc &MCID = TM.getInstrInfo()->get(MI.getOpcode());
if ((MCID.isCall() && !MCID.isReturn()) ||
II->isStackAligningInlineAsm()) {
MI.isStackAligningInlineAsm()) {
MFI->setHasCalls(true);
}
if (II->isInlineAsm()) {
if (MI.isInlineAsm()) {
MF->setHasInlineAsm(true);
}
}

4
lib/CodeGen/TailDuplication.cpp
View File

@ -364,9 +364,7 @@ static unsigned getPHISrcRegOpIdx(MachineInstr *MI, MachineBasicBlock *SrcBB) {
// block (which is why we need to copy the information).
static void getRegsUsedByPHIs(const MachineBasicBlock &BB,
DenseSet<unsigned> *UsedByPhi) {
for(MachineBasicBlock::const_iterator I = BB.begin(), E = BB.end();
I != E; ++I) {
const MachineInstr &MI = *I;
for (const auto &MI : BB) {
if (!MI.isPHI())
break;
for (unsigned i = 1, e = MI.getNumOperands(); i != e; i += 2) {