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Mark FP_ROUND for converting NEON v2f64 to v2f32 as expand. Add a missing

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case to vector legalization so this actually works.

Patch by Pete Couperus.  Fixes PR12540.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168107 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eli Friedman 2012-11-15 22:44:27 +00:00
parent a5a241cf31
commit 846ce8ea67
3 changed files with 12 additions and 0 deletions
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1
lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
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@ -221,6 +221,7 @@ SDValue VectorLegalizer::LegalizeOp(SDValue Op) {
case ISD::FRINT: case ISD::FRINT:
case ISD::FNEARBYINT: case ISD::FNEARBYINT:
case ISD::FFLOOR: case ISD::FFLOOR:
case ISD::FP_ROUND:
case ISD::FMA: case ISD::FMA:
case ISD::SIGN_EXTEND_INREG: case ISD::SIGN_EXTEND_INREG:
QueryType = Node->getValueType(0); QueryType = Node->getValueType(0);

2
lib/Target/ARM/ARMISelLowering.cpp
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@ -544,6 +544,8 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
setOperationAction(ISD::FP_TO_UINT, MVT::v4i16, Custom); setOperationAction(ISD::FP_TO_UINT, MVT::v4i16, Custom);
setOperationAction(ISD::FP_TO_SINT, MVT::v4i16, Custom); setOperationAction(ISD::FP_TO_SINT, MVT::v4i16, Custom);
setOperationAction(ISD::FP_ROUND, MVT::v2f32, Expand);
setTargetDAGCombine(ISD::INTRINSIC_VOID); setTargetDAGCombine(ISD::INTRINSIC_VOID);
setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN); setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN);
setTargetDAGCombine(ISD::INTRINSIC_WO_CHAIN); setTargetDAGCombine(ISD::INTRINSIC_WO_CHAIN);

9
test/CodeGen/ARM/neon_fpconv.ll Normal file
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@ -0,0 +1,9 @@
; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
; PR12540: ARM backend lowering of FP_ROUND v2f64 to v2f32.
define <2 x float> @vtrunc(<2 x double> %a) {
; CHECK: vcvt.f32.f64 [[S0:s[0-9]+]], [[D0:d[0-9]+]]
; CHECK: vcvt.f32.f64 [[S1:s[0-9]+]], [[D1:d[0-9]+]]
%vt = fptrunc <2 x double> %a to <2 x float>
ret <2 x float> %vt
}