From 84bd5639754f02ee25f4dd11cedae0b94332627a Mon Sep 17 00:00:00 2001
From: Renato Golin <renato.golin@linaro.org>
Date: Tue, 5 Aug 2014 15:29:41 +0000
Subject: [PATCH] Add tests for cp10/cp11 on ARMv5/6

Tests for ARMv7/8 are already on diagnostics.s

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214872 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/MC/ARM/coproc-diag.s | 10 ++++++++++
 1 file changed, 10 insertions(+)
 create mode 100644 test/MC/ARM/coproc-diag.s

diff --git a/test/MC/ARM/coproc-diag.s b/test/MC/ARM/coproc-diag.s
new file mode 100644
index 00000000000..c96f2db6b6e
--- /dev/null
+++ b/test/MC/ARM/coproc-diag.s
@@ -0,0 +1,10 @@
+# Special test to make sure we don't error on VFP co-proc access
+@ RUN: llvm-mc -triple=armv5 < %s | FileCheck %s
+@ RUN: llvm-mc -triple=armv6 < %s | FileCheck %s
+
+        @ p10 and p11 are reserved for NEON, but accessible on v5/v6
+        ldc  p10, cr0, [r0], {0x20}
+        ldc2 p11, cr0, [r0], {0x21}
+        ldcl p11, cr0, [r0], {0x20}
+
+@ CHECK-NOT: error: invalid operand for instruction