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Fix superreg use in ARMAsmPrinter. Approved by Anton Korobeynikov.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81878 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sandeep Patel 2009-09-15 17:53:11 +00:00
parent db486a6d53
commit 85111a9c07
2 changed files with 43 additions and 2 deletions
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4
lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
View File

@ -318,8 +318,8 @@ void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
<< '}';
} else if (Modifier && strcmp(Modifier, "lane") == 0) {
unsigned RegNum = ARMRegisterInfo::getRegisterNumbering(Reg);
unsigned DReg = TRI->getMatchingSuperReg(Reg, RegNum & 1 ? 0 : 1,
&ARM::DPRRegClass);
unsigned DReg = TRI->getMatchingSuperReg(Reg, RegNum & 1 ? 2 : 1,
&ARM::DPR_VFP2RegClass);
O << getRegisterName(DReg) << '[' << (RegNum & 1) << ']';
} else {
O << getRegisterName(Reg);

41
test/CodeGen/ARM/2009-09-13-InvalidSuperReg.ll Normal file
View File

@ -0,0 +1,41 @@
; RUN: llc < %s -march=arm -mattr=+neon -mcpu=cortex-a9
define arm_aapcs_vfpcc <4 x float> @foo(i8* nocapture %pBuffer, i32 %numItems) nounwind {
%1 = ptrtoint i8* %pBuffer to i32
%lsr.iv2641 = inttoptr i32 %1 to float*
%tmp29 = add i32 %1, 4
%tmp2930 = inttoptr i32 %tmp29 to float*
%tmp31 = add i32 %1, 8
%tmp3132 = inttoptr i32 %tmp31 to float*
%tmp33 = add i32 %1, 12
%tmp3334 = inttoptr i32 %tmp33 to float*
%tmp35 = add i32 %1, 16
%tmp3536 = inttoptr i32 %tmp35 to float*
%tmp37 = add i32 %1, 20
%tmp3738 = inttoptr i32 %tmp37 to float*
%tmp39 = add i32 %1, 24
%tmp3940 = inttoptr i32 %tmp39 to float*
%2 = load float* %lsr.iv2641, align 4
%3 = load float* %tmp2930, align 4
%4 = load float* %tmp3132, align 4
%5 = load float* %tmp3334, align 4
%6 = load float* %tmp3536, align 4
%7 = load float* %tmp3738, align 4
%8 = load float* %tmp3940, align 4
%9 = insertelement <4 x float> undef, float %6, i32 0
%10 = shufflevector <4 x float> %9, <4 x float> undef, <4 x i32> zeroinitializer
%11 = insertelement <4 x float> %10, float %7, i32 1
%12 = insertelement <4 x float> %11, float %8, i32 2
%13 = insertelement <4 x float> undef, float %2, i32 0
%14 = shufflevector <4 x float> %13, <4 x float> undef, <4 x i32> zeroinitializer
%15 = insertelement <4 x float> %14, float %3, i32 1
%16 = insertelement <4 x float> %15, float %4, i32 2
%17 = insertelement <4 x float> %16, float %5, i32 3
%18 = fsub <4 x float> zeroinitializer, %12
%19 = shufflevector <4 x float> %18, <4 x float> undef, <4 x i32> zeroinitializer
%20 = shufflevector <4 x float> %17, <4 x float> undef, <2 x i32> <i32 0, i32 1>
%21 = shufflevector <2 x float> %20, <2 x float> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
ret <4 x float> %21
}