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[Thumb/Thumb2] Implement restrictions on SP in register list on LDM, STM variants in thumb mode

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220379 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jyoti Allur 2014-10-22 10:41:14 +00:00
parent 3e874e64ed
commit 8546076401
2 changed files with 69 additions and 2 deletions
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25
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
View File

@ -5976,7 +5976,9 @@ bool ARMAsmParser::validateInstruction(MCInst &Inst,
return Error(Operands[3]->getStartLoc(),
"writeback operator '!' not allowed when base register "
"in register list");
if (listContainsReg(Inst, 3 + HasWritebackToken, ARM::SP))
return Error(Operands[3 + HasWritebackToken]->getStartLoc(),
"SP not allowed in register list");
break;
}
case ARM::LDMIA_UPD:
@ -5987,7 +5989,19 @@ bool ARMAsmParser::validateInstruction(MCInst &Inst,
// UNPREDICTABLE on v7 upwards. Goodness knows what they did before.
if (!hasV7Ops())
break;
// Fallthrough
if (listContainsReg(Inst, 3, Inst.getOperand(0).getReg()))
return Error(Operands.back()->getStartLoc(),
"writeback register not allowed in register list");
break;
case ARM::t2LDMIA:
case ARM::t2LDMDB:
case ARM::t2STMIA:
case ARM::t2STMDB: {
if (listContainsReg(Inst, 3, ARM::SP))
return Error(Operands.back()->getStartLoc(),
"SP not allowed in register list");
break;
}
case ARM::t2LDMIA_UPD:
case ARM::t2LDMDB_UPD:
case ARM::t2STMIA_UPD:
@ -5995,6 +6009,10 @@ bool ARMAsmParser::validateInstruction(MCInst &Inst,
if (listContainsReg(Inst, 3, Inst.getOperand(0).getReg()))
return Error(Operands.back()->getStartLoc(),
"writeback register not allowed in register list");
if (listContainsReg(Inst, 4, ARM::SP))
return Error(Operands.back()->getStartLoc(),
"SP not allowed in register list");
break;
}
case ARM::sysLDMIA_UPD:
@ -6063,6 +6081,9 @@ bool ARMAsmParser::validateInstruction(MCInst &Inst,
return Error(Operands[4]->getStartLoc(),
"writeback operator '!' not allowed when base register "
"in register list");
if (listContainsReg(Inst, 4, ARM::SP) && !inITBlock())
return Error(Operands.back()->getStartLoc(),
"SP not allowed in register list");
break;
}
case ARM::tADDrSP: {

46
test/MC/ARM/thumb-diagnostics.s
View File

@ -2,6 +2,8 @@
@ RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
@ RUN: not llvm-mc -triple=thumbv5-apple-darwin < %s 2> %t
@ RUN: FileCheck --check-prefix=CHECK-ERRORS-V5 < %t %s
@ RUN: not llvm-mc -triple=thumbv7m < %s 2> %t
@ RUN: FileCheck --check-prefix=CHECK-ERRORS-V7M < %t %s
@ RUN: not llvm-mc -triple=thumbv8 < %s 2> %t
@ RUN: FileCheck --check-prefix=CHECK-ERRORS-V8 < %t %s
@ -59,6 +61,13 @@ error: invalid operand for instruction
ldm r2!, {r2, r3, r4}
ldm r2!, {r2, r3, r4, r10}
ldmdb r2!, {r2, r3, r4}
ldm r0, {r2, sp}
ldmia r0, {r2-r3, sp}
ldmia r0!, {r2-r3, sp}
ldmfd r2, {r1, r3-r6, sp}
ldmfd r2!, {r1, r3-r6, sp}
ldmdb r1, {r2, r3, sp}
ldmdb r1!, {r2, r3, sp}
@ CHECK-ERRORS: error: registers must be in range r0-r7
@ CHECK-ERRORS: ldm r2!, {r5, r8}
@ CHECK-ERRORS: ^
@ -74,6 +83,27 @@ error: invalid operand for instruction
@ CHECK-ERRORS-V8: error: writeback register not allowed in register list
@ CHECK-ERRORS-V8: ldmdb r2!, {r2, r3, r4}
@ CHECK-ERRORS-V8: ^
@ CHECK-ERRORS-V7M: error: SP not allowed in register list
@ CHECK-ERRORS-V7M: ldm r0, {r2, sp}
@ CHECK-ERRORS-V7M: ^
@ CHECK-ERRORS-V7M: error: SP not allowed in register list
@ CHECK-ERRORS-V7M: ldmia r0, {r2-r3, sp}
@ CHECK-ERRORS-V7M: ^
@ CHECK-ERRORS-V7M: error: SP not allowed in register list
@ CHECK-ERRORS-V7M: ldmia r0!, {r2-r3, sp}
@ CHECK-ERRORS-V7M: ^
@ CHECK-ERRORS-V7M: error: SP not allowed in register list
@ CHECK-ERRORS-V7M: ldmfd r2, {r1, r3-r6, sp}
@ CHECK-ERRORS-V7M: ^
@ CHECK-ERRORS-V7M: error: SP not allowed in register list
@ CHECK-ERRORS-V7M: ldmfd r2!, {r1, r3-r6, sp}
@ CHECK-ERRORS-V7M: ^
@ CHECK-ERRORS-V7M: error: SP not allowed in register list
@ CHECK-ERRORS-V7M: ldmdb r1, {r2, r3, sp}
@ CHECK-ERRORS-V7M: ^
@ CHECK-ERRORS-V7M: error: SP not allowed in register list
@ CHECK-ERRORS-V7M: ldmdb r1!, {r2, r3, sp}
@ CHECK-ERRORS-V7M: ^
@ Invalid writeback and register lists for PUSH/POP
pop {r1, r2, r10}
@ -91,6 +121,10 @@ error: invalid operand for instruction
stm r1!, {r2, r9}
stm r2!, {r2, r9}
stmdb r2!, {r0, r2}
stm r1!, {r2, sp}
stmia r4!, {r0-r3, sp}
stmdb r1, {r2, r3, sp}
stmdb r1!, {r2, r3, sp}
@ CHECK-ERRORS: error: instruction requires: thumb2
@ CHECK-ERRORS: stm r1, {r2, r6}
@ CHECK-ERRORS: ^
@ -103,6 +137,18 @@ error: invalid operand for instruction
@ CHECK-ERRORS-V8: error: writeback register not allowed in register list
@ CHECK-ERRORS-V8: stmdb r2!, {r0, r2}
@ CHECK-ERRORS-V8: ^
@ CHECK-ERRORS-V7M: error: SP not allowed in register list
@ CHECK-ERRORS-V7M: stm r1!, {r2, sp}
@ CHECK-ERRORS-V7M: ^
@ CHECK-ERRORS-V7M: error: SP not allowed in register list
@ CHECK-ERRORS-V7M: stmia r4!, {r0-r3, sp}
@ CHECK-ERRORS-V7M: ^
@ CHECK-ERRORS-V7M: error: SP not allowed in register list
@ CHECK-ERRORS-V7M: stmdb r1, {r2, r3, sp}
@ CHECK-ERRORS-V7M: ^
@ CHECK-ERRORS-V7M: error: SP not allowed in register list
@ CHECK-ERRORS-V7M: stmdb r1!, {r2, r3, sp}
@ CHECK-ERRORS-V7M: ^
@ Out of range immediates for LSL instruction.
lsls r4, r5, #-1