6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-04-14 22:38:03 +00:00
Code Issues Projects Releases Wiki Activity

ARM64: remove buggy REV16 pattern.

Browse Source 
The 32-bit pattern is still valid: 0123 -> 3210 -> 1032.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206172 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover 2014-04-14 12:59:52 +00:00
parent e90d4e2c69
commit 856ecbc068
2 changed files with 5 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
lib/Target/ARM64/ARM64InstrInfo.td
View File

@ -645,8 +645,7 @@ defm CLZ : OneOperandData<0b100, "clz", ctlz>;
defm RBIT : OneOperandData<0b000, "rbit">;
def REV16Wr : OneWRegData<0b001, "rev16",
UnOpFrag<(rotr (bswap node:$LHS), (i64 16))>>;
def REV16Xr : OneXRegData<0b001, "rev16",
UnOpFrag<(rotr (bswap node:$LHS), (i64 16))>>;
def REV16Xr : OneXRegData<0b001, "rev16", null_frag>;
def : Pat<(cttz GPR32:$Rn),
(CLZWr (RBITWr GPR32:$Rn))>;

5
test/CodeGen/ARM64/rev.ll
View File

@ -36,10 +36,13 @@ entry:
ret i32 %tmp14
}
; 64-bit REV16 is *not* a swap then a 16-bit rotation:
; 01234567 ->(bswap) 76543210 ->(rotr) 10765432
; 01234567 ->(rev16) 10325476
define i64 @test_rev16_x(i64 %a) nounwind {
entry:
; CHECK-LABEL: test_rev16_x:
; CHECK: rev16 x0, x0
; CHECK-NOT: rev16 x0, x0
%0 = tail call i64 @llvm.bswap.i64(i64 %a)
%1 = lshr i64 %0, 16
%2 = shl i64 %0, 48