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fix up more lsmark stuff

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25550 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Lenharth 2006-01-23 21:23:26 +00:00
parent 167bc6ee7a
commit 87076054e6
2 changed files with 22 additions and 15 deletions
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11
lib/Target/Alpha/AlphaISelLowering.cpp
View File

@ -73,6 +73,14 @@ AlphaTargetLowering::AlphaTargetLowering(TargetMachine &TM) : TargetLowering(TM)
setOperationAction(ISD::LOAD, MVT::i64, Custom);
setOperationAction(ISD::LOAD, MVT::f64, Custom);
setOperationAction(ISD::LOAD, MVT::f32, Custom);
setOperationAction(ISD::ZEXTLOAD, MVT::i8, Custom);
setOperationAction(ISD::ZEXTLOAD, MVT::i16, Custom);
setOperationAction(ISD::SEXTLOAD, MVT::i32, Custom);
setOperationAction(ISD::EXTLOAD, MVT::i8, Custom);
setOperationAction(ISD::EXTLOAD, MVT::i16, Custom);
setOperationAction(ISD::EXTLOAD, MVT::i32, Custom);
}
setOperationAction(ISD::FREM, MVT::f32, Expand);
@ -578,6 +586,7 @@ SDOperand AlphaTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
case ISD::LOAD:
case ISD::SEXTLOAD:
case ISD::ZEXTLOAD:
case ISD::EXTLOAD:
{
SDOperand Chain = Op.getOperand(0);
SDOperand Address = Op.getOperand(1);
@ -612,13 +621,13 @@ SDOperand AlphaTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
VTS.push_back(Op.Val->getValueType(0));
VTS.push_back(MVT::Other);
std::vector<SDOperand> ARGS;
ARGS.push_back(Chain);
ARGS.push_back(Zero);
ARGS.push_back(Address);
ARGS.push_back(DAG.getConstant(i, MVT::i64));
ARGS.push_back(DAG.getConstant(j, MVT::i64));
ARGS.push_back(DAG.getConstant(k, MVT::i64));
ARGS.push_back(DAG.getConstant(getUID(), MVT::i64));
ARGS.push_back(Chain);
return DAG.getNode(Opc, VTS, ARGS);
}

26
lib/Target/Alpha/AlphaInstrInfo.td
View File

@ -31,12 +31,12 @@ def Alpha_cvttq : SDNode<"AlphaISD::CVTTQ_" , SDTFPUnaryOp, []>;
def Alpha_gprello : SDNode<"AlphaISD::GPRelLo", SDTIntBinOp, []>;
def Alpha_gprelhi : SDNode<"AlphaISD::GPRelHi", SDTIntBinOp, []>;
def Alpha_rellit : SDNode<"AlphaISD::RelLit", SDTIntBinOp, []>;
def Alpha_ldq : SDNode<"AlphaISD::LDQ_", SDTLoadA, [SDNPInFlag]>;
def Alpha_ldt : SDNode<"AlphaISD::LDT_", SDTLoadA, [SDNPInFlag]>;
def Alpha_lds : SDNode<"AlphaISD::LDS_", SDTLoadA, [SDNPInFlag]>;
def Alpha_ldl : SDNode<"AlphaISD::LDL_", SDTLoadA, [SDNPInFlag]>;
def Alpha_ldwu : SDNode<"AlphaISD::LDWU_", SDTLoadA, [SDNPInFlag]>;
def Alpha_ldbu : SDNode<"AlphaISD::LDBU_", SDTLoadA, [SDNPInFlag]>;
def Alpha_ldq : SDNode<"AlphaISD::LDQ_", SDTLoadA, [SDNPHasChain]>;
def Alpha_ldt : SDNode<"AlphaISD::LDT_", SDTLoadA, [SDNPHasChain]>;
def Alpha_lds : SDNode<"AlphaISD::LDS_", SDTLoadA, [SDNPHasChain]>;
def Alpha_ldl : SDNode<"AlphaISD::LDL_", SDTLoadA, [SDNPHasChain]>;
def Alpha_ldwu : SDNode<"AlphaISD::LDWU_", SDTLoadA, [SDNPHasChain]>;
def Alpha_ldbu : SDNode<"AlphaISD::LDBU_", SDTLoadA, [SDNPHasChain]>;
// These are target-independent nodes, but have target-specific formats.
def SDT_AlphaCallSeq : SDTypeProfile<0, 1, [ SDTCisVT<0, i64> ]>;
@ -123,7 +123,6 @@ def ADJUSTSTACKDOWN : PseudoInstAlpha<(ops s64imm:$amt), "; ADJDOWN $amt",
}
def ALTENT : PseudoInstAlpha<(ops s64imm:$TARGET), "$$$TARGET..ng:\n", []>;
def PCLABEL : PseudoInstAlpha<(ops s64imm:$num), "PCMARKER_$num:\n",[]>;
let noResults = 1 in
def MEMLABEL : PseudoInstAlpha<(ops s64imm:$i, s64imm:$j, s64imm:$k, s64imm:$m),
"LSMARKER$$$i$$$j$$$k$$$m:", []>;
@ -584,6 +583,12 @@ let OperandList = (ops GPRC:$RA, s64imm:$DISP, GPRC:$RB,
s64imm:$i, s64imm:$j, s64imm:$k, s64imm:$m) in {
def LDQlbl : MForm<0x29, 0, 1, "LSMARKER$$$i$$$j$$$k$$$m:\n\t ldq $RA,$DISP($RB)",
[(set GPRC:$RA, (Alpha_ldq imm:$DISP, GPRC:$RB, imm:$i, imm:$j, imm:$k, imm:$m))]>;
def LDLlbl : MForm<0x29, 0, 1, "LSMARKER$$$i$$$j$$$k$$$m:\n\t ldl $RA,$DISP($RB)",
[(set GPRC:$RA, (Alpha_ldl imm:$DISP, GPRC:$RB, imm:$i, imm:$j, imm:$k, imm:$m))]>;
def LDBUlbl : MForm<0x0A, 0, 1, "LSMARKER$$$i$$$j$$$k$$$m:\n\t ldbu $RA,$DISP($RB)",
[(set GPRC:$RA, (Alpha_ldwu imm:$DISP, GPRC:$RB, imm:$i, imm:$j, imm:$k, imm:$m))]>;
def LDWUlbl : MForm<0x0C, 0, 1, "LSMARKER$$$i$$$j$$$k$$$m:\n\t ldwu $RA,$DISP($RB)",
[(set GPRC:$RA, (Alpha_ldbu imm:$DISP, GPRC:$RB, imm:$i, imm:$j, imm:$k, imm:$m))]>;
}
let OperandList = (ops F8RC:$RA, s64imm:$DISP, GPRC:$RB,
@ -596,13 +601,6 @@ let OperandList = (ops F4RC:$RA, s64imm:$DISP, GPRC:$RB,
def LDSlbl : MForm<0x29, 0, 1, "LSMARKER$$$i$$$j$$$k$$$m:\n\t lds $RA,$DISP($RB)",
[(set F4RC:$RA, (Alpha_lds imm:$DISP, GPRC:$RB, imm:$i, imm:$j, imm:$k, imm:$m))]>;
//def LDLlbl : MForm<0x29, 0, 1, "ldl $RA,$DISP($RB)",
// [(set GPRC:$RA, (sextload (add GPRC:$RB, immSExt16:$DISP), i32))]>;
//def LDBUlbl : MForm<0x0A, 0, 1, "ldbu $RA,$DISP($RB)",
// [(set GPRC:$RA, (zextload (add GPRC:$RB, immSExt16:$DISP), i8))]>;
//def LDWUlbl : MForm<0x0C, 0, 1, "ldwu $RA,$DISP($RB)",
// [(set GPRC:$RA, (zextload (add GPRC:$RB, immSExt16:$DISP), i16))]>;
def RPCC : MfcForm<0x18, 0xC000, "rpcc $RA">; //Read process cycle counter
//Basic Floating point ops