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SMS for superblocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21643 91177308-0d34-0410-b5e6-96231b3b80d8
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Tanya Lattner
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//===-- ModuloSchedulingSuperBlock.cpp - ModuloScheduling--------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This ModuloScheduling pass is based on the Swing Modulo Scheduling
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// algorithm, but has been extended to support SuperBlocks (multiple
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// basic block, single entry, multipl exit loops).
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "ModuloSchedSB"
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#include "DependenceAnalyzer.h"
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#include "ModuloSchedulingSuperBlock.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Support/CFG.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/GraphWriter.h"
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#include "llvm/Instructions.h"
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#include "../MachineCodeForInstruction.h"
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#include "../SparcV9RegisterInfo.h"
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#include "../SparcV9Internals.h"
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#include "../SparcV9TmpInstr.h"
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#include <fstream>
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#include <sstream>
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using namespace llvm;
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/// Create ModuloSchedulingSBPass
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///
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FunctionPass *llvm::createModuloSchedulingSBPass(TargetMachine & targ) {
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DEBUG(std::cerr << "Created ModuloSchedulingSBPass\n");
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return new ModuloSchedulingSBPass(targ);
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}
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//Graph Traits for printing out the dependence graph
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template<typename GraphType>
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static void WriteGraphToFile(std::ostream &O, const std::string &GraphName,
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const GraphType >) {
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std::string Filename = GraphName + ".dot";
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O << "Writing '" << Filename << "'...";
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std::ofstream F(Filename.c_str());
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if (F.good())
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WriteGraph(F, GT);
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else
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O << " error opening file for writing!";
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O << "\n";
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};
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namespace llvm {
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Statistic<> NumLoops("moduloschedSB-numLoops", "Total Number of Loops");
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Statistic<> NumSB("moduloschedSB-numSuperBlocks", "Total Number of SuperBlocks");
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Statistic<> BBWithCalls("modulosched-BBCalls", "Basic Blocks rejected due to calls");
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Statistic<> BBWithCondMov("modulosched-loopCondMov", "Basic Blocks rejected due to conditional moves");
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bool ModuloSchedulingSBPass::runOnFunction(Function &F) {
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bool Changed = false;
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//Get MachineFunction
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MachineFunction &MF = MachineFunction::get(&F);
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//Get Loop Info & Dependence Anaysis info
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LoopInfo &LI = getAnalysis<LoopInfo>();
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DependenceAnalyzer &DA = getAnalysis<DependenceAnalyzer>();
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//Worklist of superblocks
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std::vector<std::vector<const MachineBasicBlock*> > Worklist;
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FindSuperBlocks(F, LI, Worklist);
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DEBUG(if(Worklist.size() == 0) std::cerr << "No superblocks in function to ModuloSchedule\n");
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//Loop over worklist and ModuloSchedule each SuperBlock
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for(std::vector<std::vector<const MachineBasicBlock*> >::iterator SB = Worklist.begin(),
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SBE = Worklist.end(); SB != SBE; ++SB) {
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//Print out Superblock
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DEBUG(std::cerr << "ModuloScheduling SB: \n";
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for(std::vector<const MachineBasicBlock*>::const_iterator BI = SB->begin(),
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BE = SB->end(); BI != BE; ++BI) {
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(*BI)->print(std::cerr);});
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if(!CreateDefMap(*SB)) {
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defaultInst = 0;
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defMap.clear();
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continue;
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}
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MSchedGraph *MSG = new MSchedGraph(*SB, target, indVarInstrs[*SB], DA,
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machineTollvm[*SB]);
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//Write Graph out to file
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DEBUG(WriteGraphToFile(std::cerr, F.getName(), MSG));
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DEBUG(MSG->print(std::cerr));
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}
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return Changed;
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}
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void ModuloSchedulingSBPass::FindSuperBlocks(Function &F, LoopInfo &LI,
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std::vector<std::vector<const MachineBasicBlock*> > &Worklist) {
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//Get MachineFunction
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MachineFunction &MF = MachineFunction::get(&F);
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//Map of LLVM BB to machine BB
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std::map<BasicBlock*, MachineBasicBlock*> bbMap;
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for (MachineFunction::iterator BI = MF.begin(); BI != MF.end(); ++BI) {
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BasicBlock *llvmBB = (BasicBlock*) BI->getBasicBlock();
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assert(!bbMap.count(llvmBB) && "LLVM BB already in map!");
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bbMap[llvmBB] = &*BI;
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}
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//Iterate over the loops, and find super blocks
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for(LoopInfo::iterator LB = LI.begin(), LE = LI.end(); LB != LE; ++LB) {
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Loop *L = *LB;
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++NumLoops;
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//If loop is not single entry, try the next one
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if(!L->getLoopPreheader())
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continue;
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//Check size of this loop, we don't want SBB loops
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if(L->getBlocks().size() == 1)
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continue;
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//Check if this loop contains no sub loops
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if(L->getSubLoops().size() == 0) {
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std::vector<const MachineBasicBlock*> superBlock;
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//Get Loop Headers
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BasicBlock *header = L->getHeader();
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//Follow the header and make sure each BB only has one entry and is valid
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BasicBlock *current = header;
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assert(bbMap.count(current) && "LLVM BB must have corresponding Machine BB\n");
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MachineBasicBlock *currentMBB = bbMap[header];
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bool done = false;
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bool success = true;
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while(!done) {
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if(MachineBBisValid(currentMBB)) {
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//Loop over successors of this BB, they should be in the loop block
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//and be valid
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BasicBlock *next = 0;
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for(succ_iterator I = succ_begin(current), E = succ_end(current);
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I != E; ++I) {
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if(L->contains(*I)) {
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if(!next)
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next = *I;
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else {
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done = true;
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success = false;
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break;
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}
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}
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}
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if(success) {
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superBlock.push_back(currentMBB);
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if(next == header)
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done = true;
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else if(!next->getSinglePredecessor()) {
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done = true;
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success = false;
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}
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else {
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//Check that the next BB only has one entry
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current = next;
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assert(bbMap.count(current) && "LLVM BB must have corresponding Machine BB");
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currentMBB = bbMap[current];
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}
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}
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}
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else {
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done = true;
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success = false;
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}
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}
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if(success) {
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++NumSB;
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Worklist.push_back(superBlock);
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}
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}
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}
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}
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/// This function checks if a Machine Basic Block is valid for modulo
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/// scheduling. This means that it has no control flow (if/else or
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/// calls) in the block. Currently ModuloScheduling only works on
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/// single basic block loops.
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bool ModuloSchedulingSBPass::MachineBBisValid(const MachineBasicBlock *BI) {
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//Check size of our basic block.. make sure we have more then just the terminator in it
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if(BI->getBasicBlock()->size() == 1)
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return false;
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//Get Target machine instruction info
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const TargetInstrInfo *TMI = target.getInstrInfo();
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//Check each instruction and look for calls, keep map to get index later
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std::map<const MachineInstr*, unsigned> indexMap;
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unsigned count = 0;
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for(MachineBasicBlock::const_iterator I = BI->begin(), E = BI->end(); I != E; ++I) {
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//Get opcode to check instruction type
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MachineOpCode OC = I->getOpcode();
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//Look for calls
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if(TMI->isCall(OC)) {
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++BBWithCalls;
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return false;
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}
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//Look for conditional move
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if(OC == V9::MOVRZr || OC == V9::MOVRZi || OC == V9::MOVRLEZr || OC == V9::MOVRLEZi
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|| OC == V9::MOVRLZr || OC == V9::MOVRLZi || OC == V9::MOVRNZr || OC == V9::MOVRNZi
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|| OC == V9::MOVRGZr || OC == V9::MOVRGZi || OC == V9::MOVRGEZr
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|| OC == V9::MOVRGEZi || OC == V9::MOVLEr || OC == V9::MOVLEi || OC == V9::MOVLEUr
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|| OC == V9::MOVLEUi || OC == V9::MOVFLEr || OC == V9::MOVFLEi
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|| OC == V9::MOVNEr || OC == V9::MOVNEi || OC == V9::MOVNEGr || OC == V9::MOVNEGi
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|| OC == V9::MOVFNEr || OC == V9::MOVFNEi) {
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++BBWithCondMov;
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return false;
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}
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indexMap[I] = count;
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if(TMI->isNop(OC))
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continue;
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++count;
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}
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return true;
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}
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}
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bool ModuloSchedulingSBPass::CreateDefMap(std::vector<const MachineBasicBlock*> &SB) {
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defaultInst = 0;
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for(std::vector<const MachineBasicBlock*>::iterator BI = SB.begin(),
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BE = SB.end(); BI != BE; ++BI) {
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for(MachineBasicBlock::const_iterator I = (*BI)->begin(), E = (*BI)->end(); I != E; ++I) {
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for(unsigned opNum = 0; opNum < I->getNumOperands(); ++opNum) {
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const MachineOperand &mOp = I->getOperand(opNum);
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if(mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isDef()) {
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//assert if this is the second def we have seen
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assert(!defMap.count(mOp.getVRegValue()) && "Def already in the map");
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defMap[mOp.getVRegValue()] = (MachineInstr*) &*I;
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}
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//See if we can use this Value* as our defaultInst
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if(!defaultInst && mOp.getType() == MachineOperand::MO_VirtualRegister) {
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Value *V = mOp.getVRegValue();
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if(!isa<TmpInstruction>(V) && !isa<Argument>(V) && !isa<Constant>(V) && !isa<PHINode>(V))
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defaultInst = (Instruction*) V;
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}
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}
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}
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}
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if(!defaultInst)
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return false;
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return true;
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}
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@ -0,0 +1,97 @@
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//===-- ModuloSchedulingSuperBlock.h -Swing Modulo Scheduling-----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//Swing Modulo Scheduling done on Superblocks ( entry, multiple exit,
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//multiple basic block loops).
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_MODULOSCHEDULINGSB_H
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#define LLVM_MODULOSCHEDULINGSB_H
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#include "llvm/Analysis/LoopInfo.h"
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#include "llvm/Function.h"
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#include "llvm/Pass.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "MSSchedule.h"
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#include "MSchedGraph.h"
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namespace llvm {
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//Struct to contain ModuloScheduling Specific Information for each node
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struct MSNodeAttributes {
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int ASAP; //Earliest time at which the opreation can be scheduled
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int ALAP; //Latest time at which the operation can be scheduled.
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int MOB;
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int depth;
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int height;
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MSNodeAttributes(int asap=-1, int alap=-1, int mob=-1,
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int d=-1, int h=-1) : ASAP(asap), ALAP(alap),
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MOB(mob), depth(d),
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height(h) {}
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};
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typedef std::vector<const MachineBasicBlock*> SuperBlock;
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class ModuloSchedulingSBPass : public FunctionPass {
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const TargetMachine ⌖
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//Map to hold Value* defs
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std::map<const Value*, MachineInstr*> defMap;
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//Map to hold list of instructions associate to the induction var for each BB
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std::map<SuperBlock, std::map<const MachineInstr*, unsigned> > indVarInstrs;
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//Map to hold machine to llvm instrs for each valid BB
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std::map<SuperBlock, std::map<MachineInstr*, Instruction*> > machineTollvm;
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//LLVM Instruction we know we can add TmpInstructions to its MCFI
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Instruction *defaultInst;
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//Map that holds node to node attribute information
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std::map<MSchedGraphNode*, MSNodeAttributes> nodeToAttributesMap;
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//Map to hold all reccurrences
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std::set<std::pair<int, std::vector<MSchedGraphNode*> > > recurrenceList;
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//Set of edges to ignore, stored as src node and index into vector of successors
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std::set<std::pair<MSchedGraphNode*, unsigned> > edgesToIgnore;
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//Vector containing the partial order
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std::vector<std::set<MSchedGraphNode*> > partialOrder;
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//Vector containing the final node order
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std::vector<MSchedGraphNode*> FinalNodeOrder;
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//Schedule table, key is the cycle number and the vector is resource, node pairs
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MSSchedule schedule;
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//Current initiation interval
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int II;
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//Internal Functions
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void FindSuperBlocks(Function &F, LoopInfo &LI,
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std::vector<std::vector<const MachineBasicBlock*> > &Worklist);
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bool MachineBBisValid(const MachineBasicBlock *B);
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bool CreateDefMap(std::vector<const MachineBasicBlock*> &SB);
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public:
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ModuloSchedulingSBPass(TargetMachine &targ) : target(targ) {}
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virtual bool runOnFunction(Function &F);
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virtual const char* getPassName() const { return "ModuloScheduling-SuperBlock"; }
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// getAnalysisUsage
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequired<LoopInfo>();
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AU.addRequired<DependenceAnalyzer>();
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}
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};
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}
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#endif
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