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[mips] Implement ehb, ssnop, and pause in assembler

Browse Source 
Summary: Add negative tests for pause

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D3246

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205537 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Sanders 2014-04-03 13:21:51 +00:00
parent 3eb87654a5
commit 8750f9a291
22 changed files with 53 additions and 20 deletions
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11
lib/Target/Mips/MipsInstrFormats.td
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@ -818,3 +818,14 @@ class CMov_F_F_FM<bits<5> fmt, bit tf> : StdArch {
let Inst{10-6} = fd; let Inst{10-6} = fd;
let Inst{5-0} = 0x11; let Inst{5-0} = 0x11;
} }
class BARRIER_FM<bits<5> op> : StdArch {
bits<32> Inst;
let Inst{31-26} = 0; // SPECIAL
let Inst{25-21} = 0;
let Inst{20-16} = 0; // rt = 0
let Inst{15-11} = 0; // rd = 0
let Inst{10-6} = op; // Operation
let Inst{5-0} = 0; // SLL
}

6
lib/Target/Mips/MipsInstrInfo.td
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@ -1161,6 +1161,12 @@ def MTC0 : MFC3OP<"mtc0", GPR32Opnd>, MFC3OP_FM<0x10, 4>;
def MFC2 : MFC3OP<"mfc2", GPR32Opnd>, MFC3OP_FM<0x12, 0>; def MFC2 : MFC3OP<"mfc2", GPR32Opnd>, MFC3OP_FM<0x12, 0>;
def MTC2 : MFC3OP<"mtc2", GPR32Opnd>, MFC3OP_FM<0x12, 4>; def MTC2 : MFC3OP<"mtc2", GPR32Opnd>, MFC3OP_FM<0x12, 4>;
class Barrier<string asmstr> : InstSE<(outs), (ins), asmstr, [], NoItinerary,
FrmOther>;
def SSNOP : Barrier<"ssnop">, BARRIER_FM<1>;
def EHB : Barrier<"ehb">, BARRIER_FM<3>;
def PAUSE : Barrier<"pause">, BARRIER_FM<5>, Requires<[HasMips32r2]>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Instruction aliases // Instruction aliases
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//

2
test/MC/Mips/mips1/valid-xfail.s
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@ -12,8 +12,6 @@
tlbr tlbr
tlbwi tlbwi
tlbwr tlbwr
ehb
lwc0 c0_entrylo,-7321($s2) lwc0 c0_entrylo,-7321($s2)
lwc3 $10,-32265($k0) lwc3 $10,-32265($k0)
ssnop
swc0 c0_prid,18904($s3) swc0 c0_prid,18904($s3)

2
test/MC/Mips/mips1/valid.s
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@ -28,6 +28,7 @@
div.d $f29,$f20,$f27 div.d $f29,$f20,$f27
div.s $f4,$f5,$f15 div.s $f4,$f5,$f15
divu $zero,$t9,$t7 divu $zero,$t9,$t7
ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
lb $t8,-14515($t2) lb $t8,-14515($t2)
lbu $t0,30195($v1) lbu $t0,30195($v1)
lh $t3,-8556($s5) lh $t3,-8556($s5)
@ -71,6 +72,7 @@
sltu $s4,$s5,$t3 sltu $s4,$s5,$t3
srav $s1,$s7,$sp srav $s1,$s7,$sp
srlv $t9,$s4,$a0 srlv $t9,$s4,$a0
ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4 sub $s6,$s3,$t4
sub.d $f18,$f3,$f17 sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22 sub.s $f23,$f22,$f22

2
test/MC/Mips/mips2/valid-xfail.s
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@ -8,11 +8,9 @@
# XFAIL: * # XFAIL: *
.set noat .set noat
ehb
ldc3 $29,-28645($s1) ldc3 $29,-28645($s1)
lwc3 $10,-32265($k0) lwc3 $10,-32265($k0)
sdc3 $12,5835($t2) sdc3 $12,5835($t2)
ssnop
tlbp tlbp
tlbr tlbr
tlbwi tlbwi

2
test/MC/Mips/mips2/valid.s
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@ -30,6 +30,7 @@
div.d $f29,$f20,$f27 div.d $f29,$f20,$f27
div.s $f4,$f5,$f15 div.s $f4,$f5,$f15
divu $zero,$t9,$t7 divu $zero,$t9,$t7
ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
floor.w.d $f14,$f11 floor.w.d $f14,$f11
floor.w.s $f8,$f9 floor.w.s $f8,$f9
lb $t8,-14515($t2) lb $t8,-14515($t2)
@ -85,6 +86,7 @@
sqrt.s $f0,$f1 sqrt.s $f0,$f1
srav $s1,$s7,$sp srav $s1,$s7,$sp
srlv $t9,$s4,$a0 srlv $t9,$s4,$a0
ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4 sub $s6,$s3,$t4
sub.d $f18,$f3,$f17 sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22 sub.s $f23,$f22,$f22

2
test/MC/Mips/mips3/valid-xfail.s
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@ -8,9 +8,7 @@
# XFAIL: * # XFAIL: *
.set noat .set noat
ehb
lwc3 $10,-32265($k0) lwc3 $10,-32265($k0)
ssnop
tlbp tlbp
tlbr tlbr
tlbwi tlbwi

2
test/MC/Mips/mips3/valid.s
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@ -50,6 +50,7 @@
dsrlv $s3,$t6,$s4 dsrlv $s3,$t6,$s4
dsub $a3,$s6,$t0 dsub $a3,$s6,$t0
dsubu $a1,$a1,$k0 dsubu $a1,$a1,$k0
ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
eret eret
floor.l.d $f26,$f7 floor.l.d $f26,$f7
floor.l.s $f12,$f5 floor.l.s $f12,$f5
@ -121,6 +122,7 @@
sqrt.s $f0,$f1 sqrt.s $f0,$f1
srav $s1,$s7,$sp srav $s1,$s7,$sp
srlv $t9,$s4,$a0 srlv $t9,$s4,$a0
ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4 sub $s6,$s3,$t4
sub.d $f18,$f3,$f17 sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22 sub.s $f23,$f22,$f22

8
test/MC/Mips/mips32/invalid-mips32r2.s Normal file
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@ -0,0 +1,8 @@
# Instructions that are invalid
#
# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32 \
# RUN: 2>%t1
# RUN: FileCheck %s < %t1
.set noat
pause # CHECK: requires a CPU feature not currently enabled

2
test/MC/Mips/mips32/valid-xfail.s
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@ -35,11 +35,9 @@
c.ult.s $fcc7,$f24,$f10 c.ult.s $fcc7,$f24,$f10
c.un.d $fcc6,$f23,$f24 c.un.d $fcc6,$f23,$f24
c.un.s $fcc1,$f30,$f4 c.un.s $fcc1,$f30,$f4
ehb
ldc3 $29,-28645($s1) ldc3 $29,-28645($s1)
rorv $t5,$a3,$s5 rorv $t5,$a3,$s5
sdc3 $12,5835($t2) sdc3 $12,5835($t2)
ssnop
tlbp tlbp
tlbr tlbr
tlbwi tlbwi

2
test/MC/Mips/mips32/valid.s
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@ -32,6 +32,7 @@
div.d $f29,$f20,$f27 div.d $f29,$f20,$f27
div.s $f4,$f5,$f15 div.s $f4,$f5,$f15
divu $zero,$t9,$t7 divu $zero,$t9,$t7
ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
eret eret
floor.w.d $f14,$f11 floor.w.d $f14,$f11
floor.w.s $f8,$f9 floor.w.s $f8,$f9
@ -109,6 +110,7 @@
sqrt.s $f0,$f1 sqrt.s $f0,$f1
srav $s1,$s7,$sp srav $s1,$s7,$sp
srlv $t9,$s4,$a0 srlv $t9,$s4,$a0
ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4 sub $s6,$s3,$t4
sub.d $f18,$f3,$f17 sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22 sub.s $f23,$f22,$f22

3
test/MC/Mips/mips32r2/valid-xfail.s
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@ -116,7 +116,6 @@
dpsu.h.qbr $ac2,$a1,$s6 dpsu.h.qbr $ac2,$a1,$s6
dpsx.w.ph $ac0,$s7,$gp dpsx.w.ph $ac0,$s7,$gp
dvpe $s6 dvpe $s6
ehb
emt $t0 emt $t0
evpe $v0 evpe $v0
extpdpv $s6,$ac0,$s8 extpdpv $s6,$ac0,$s8
@ -225,7 +224,6 @@
nor.v $w20,$w20,$w15 nor.v $w20,$w20,$w15
or.v $w13,$w23,$w12 or.v $w13,$w23,$w12
packrl.ph $ra,$t8,$t6 packrl.ph $ra,$t8,$t6
pause
pcnt.b $w30,$w15 pcnt.b $w30,$w15
pcnt.d $w5,$w16 pcnt.d $w5,$w16
pcnt.h $w20,$w24 pcnt.h $w20,$w24
@ -280,7 +278,6 @@
shrav_r.w $s7,$s4,$s6 shrav_r.w $s7,$s4,$s6
shrlv.ph $t6,$t2,$t1 shrlv.ph $t6,$t2,$t1
shrlv.qb $a2,$s2,$t3 shrlv.qb $a2,$s2,$t3
ssnop
sub.ps $f5,$f14,$f26 sub.ps $f5,$f14,$f26
subq.ph $ra,$t1,$s8 subq.ph $ra,$t1,$s8
subq_s.ph $t5,$s8,$s5 subq_s.ph $t5,$s8,$s5

3
test/MC/Mips/mips32r2/valid.s
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@ -35,6 +35,7 @@
div.d $f29,$f20,$f27 div.d $f29,$f20,$f27
div.s $f4,$f5,$f15 div.s $f4,$f5,$f15
divu $zero,$t9,$t7 divu $zero,$t9,$t7
ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
ei $t6 ei $t6
eret eret
floor.w.d $f14,$f11 floor.w.d $f14,$f11
@ -109,6 +110,7 @@
nop nop
nor $a3,$zero,$a3 nor $a3,$zero,$a3
or $t4,$s0,$sp or $t4,$s0,$sp
pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40]
rdhwr $sp,$11 rdhwr $sp,$11
round.w.d $f6,$f4 round.w.d $f6,$f4
round.w.s $f27,$f28 round.w.s $f27,$f28
@ -129,6 +131,7 @@
sqrt.s $f0,$f1 sqrt.s $f0,$f1
srav $s1,$s7,$sp srav $s1,$s7,$sp
srlv $t9,$s4,$a0 srlv $t9,$s4,$a0
ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4 sub $s6,$s3,$t4
sub.d $f18,$f3,$f17 sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22 sub.s $f23,$f22,$f22

2
test/MC/Mips/mips4/valid-xfail.s
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@ -36,7 +36,6 @@
c.ult.s $fcc7,$f24,$f10 c.ult.s $fcc7,$f24,$f10
c.un.d $fcc6,$f23,$f24 c.un.d $fcc6,$f23,$f24
c.un.s $fcc1,$f30,$f4 c.un.s $fcc1,$f30,$f4
ehb
madd.d $f18,$f19,$f26,$f20 madd.d $f18,$f19,$f26,$f20
madd.s $f1,$f31,$f19,$f25 madd.s $f1,$f31,$f19,$f25
msub.d $f10,$f1,$f31,$f18 msub.d $f10,$f1,$f31,$f18
@ -49,7 +48,6 @@
recip.s $f3,$f30 recip.s $f3,$f30
rsqrt.d $f3,$f28 rsqrt.d $f3,$f28
rsqrt.s $f4,$f8 rsqrt.s $f4,$f8
ssnop
tlbp tlbp
tlbr tlbr
tlbwi tlbwi

2
test/MC/Mips/mips4/valid.s
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@ -50,6 +50,7 @@
dsrlv $s3,$t6,$s4 dsrlv $s3,$t6,$s4
dsub $a3,$s6,$t0 dsub $a3,$s6,$t0
dsubu $a1,$a1,$k0 dsubu $a1,$a1,$k0
ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
eret eret
floor.l.d $f26,$f7 floor.l.d $f26,$f7
floor.l.s $f12,$f5 floor.l.s $f12,$f5
@ -136,6 +137,7 @@
sqrt.s $f0,$f1 sqrt.s $f0,$f1
srav $s1,$s7,$sp srav $s1,$s7,$sp
srlv $t9,$s4,$a0 srlv $t9,$s4,$a0
ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4 sub $s6,$s3,$t4
sub.d $f18,$f3,$f17 sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22 sub.s $f23,$f22,$f22

2
test/MC/Mips/mips5/valid-xfail.s
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@ -58,7 +58,6 @@
cvt.ps.s $f3,$f18,$f19 cvt.ps.s $f3,$f18,$f19
cvt.s.pl $f30,$f1 cvt.s.pl $f30,$f1
cvt.s.pu $f14,$f25 cvt.s.pu $f14,$f25
ehb
madd.d $f18,$f19,$f26,$f20 madd.d $f18,$f19,$f26,$f20
madd.ps $f22,$f3,$f14,$f3 madd.ps $f22,$f3,$f14,$f3
madd.s $f1,$f31,$f19,$f25 madd.s $f1,$f31,$f19,$f25
@ -86,7 +85,6 @@
recip.s $f3,$f30 recip.s $f3,$f30
rsqrt.d $f3,$f28 rsqrt.d $f3,$f28
rsqrt.s $f4,$f8 rsqrt.s $f4,$f8
ssnop
sub.ps $f5,$f14,$f26 sub.ps $f5,$f14,$f26
tlbp tlbp
tlbr tlbr

2
test/MC/Mips/mips5/valid.s
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@ -50,6 +50,7 @@
dsrlv $s3,$t6,$s4 dsrlv $s3,$t6,$s4
dsub $a3,$s6,$t0 dsub $a3,$s6,$t0
dsubu $a1,$a1,$k0 dsubu $a1,$a1,$k0
ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
eret eret
floor.l.d $f26,$f7 floor.l.d $f26,$f7
floor.l.s $f12,$f5 floor.l.s $f12,$f5
@ -137,6 +138,7 @@
sqrt.s $f0,$f1 sqrt.s $f0,$f1
srav $s1,$s7,$sp srav $s1,$s7,$sp
srlv $t9,$s4,$a0 srlv $t9,$s4,$a0
ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4 sub $s6,$s3,$t4
sub.d $f18,$f3,$f17 sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22 sub.s $f23,$f22,$f22

8
test/MC/Mips/mips64/invalid-mips64r2.s Normal file
View File

@ -0,0 +1,8 @@
# Instructions that are invalid
#
# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64 \
# RUN: 2>%t1
# RUN: FileCheck %s < %t1
.set noat
pause # CHECK: requires a CPU feature not currently enabled

2
test/MC/Mips/mips64/valid-xfail.s
View File

@ -62,7 +62,6 @@
cvt.s.pu $f14,$f25 cvt.s.pu $f14,$f25
dmfc0 $t2,c0_watchhi,2 dmfc0 $t2,c0_watchhi,2
dmtc0 $t7,c0_datalo dmtc0 $t7,c0_datalo
ehb
madd.d $f18,$f19,$f26,$f20 madd.d $f18,$f19,$f26,$f20
madd.ps $f22,$f3,$f14,$f3 madd.ps $f22,$f3,$f14,$f3
madd.s $f1,$f31,$f19,$f25 madd.s $f1,$f31,$f19,$f25
@ -92,7 +91,6 @@
recip.s $f3,$f30 recip.s $f3,$f30
rsqrt.d $f3,$f28 rsqrt.d $f3,$f28
rsqrt.s $f4,$f8 rsqrt.s $f4,$f8
ssnop
sub.ps $f5,$f14,$f26 sub.ps $f5,$f14,$f26
tlbp tlbp
tlbr tlbr

2
test/MC/Mips/mips64/valid.s
View File

@ -54,6 +54,7 @@
dsrlv $s3,$t6,$s4 dsrlv $s3,$t6,$s4
dsub $a3,$s6,$t0 dsub $a3,$s6,$t0
dsubu $a1,$a1,$k0 dsubu $a1,$a1,$k0
ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
eret eret
floor.l.d $f26,$f7 floor.l.d $f26,$f7
floor.l.s $f12,$f5 floor.l.s $f12,$f5
@ -150,6 +151,7 @@
sqrt.s $f0,$f1 sqrt.s $f0,$f1
srav $s1,$s7,$sp srav $s1,$s7,$sp
srlv $t9,$s4,$a0 srlv $t9,$s4,$a0
ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4 sub $s6,$s3,$t4
sub.d $f18,$f3,$f17 sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22 sub.s $f23,$f22,$f22

3
test/MC/Mips/mips64r2/valid-xfail.s
View File

@ -119,7 +119,6 @@
dpsx.w.ph $ac0,$s7,$gp dpsx.w.ph $ac0,$s7,$gp
drorv $at,$a1,$s7 drorv $at,$a1,$s7
dvpe $s6 dvpe $s6
ehb
emt $t0 emt $t0
evpe $v0 evpe $v0
extpdpv $s6,$ac0,$s8 extpdpv $s6,$ac0,$s8
@ -231,7 +230,6 @@
nor.v $w20,$w20,$w15 nor.v $w20,$w20,$w15
or.v $w13,$w23,$w12 or.v $w13,$w23,$w12
packrl.ph $ra,$t8,$t6 packrl.ph $ra,$t8,$t6
pause
pcnt.b $w30,$w15 pcnt.b $w30,$w15
pcnt.d $w5,$w16 pcnt.d $w5,$w16
pcnt.h $w20,$w24 pcnt.h $w20,$w24
@ -283,7 +281,6 @@
shrav_r.w $s7,$s4,$s6 shrav_r.w $s7,$s4,$s6
shrlv.ph $t6,$t2,$t1 shrlv.ph $t6,$t2,$t1
shrlv.qb $a2,$s2,$t3 shrlv.qb $a2,$s2,$t3
ssnop
sub.ps $f5,$f14,$f26 sub.ps $f5,$f14,$f26
subq.ph $ra,$t1,$s8 subq.ph $ra,$t1,$s8
subq_s.ph $t5,$s8,$s5 subq_s.ph $t5,$s8,$s5

3
test/MC/Mips/mips64r2/valid.s
View File

@ -57,6 +57,7 @@
dsrlv $s3,$t6,$s4 dsrlv $s3,$t6,$s4
dsub $a3,$s6,$t0 dsub $a3,$s6,$t0
dsubu $a1,$a1,$k0 dsubu $a1,$a1,$k0
ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0]
ei $t6 ei $t6
eret eret
floor.l.d $f26,$f7 floor.l.d $f26,$f7
@ -136,6 +137,7 @@
nop nop
nor $a3,$zero,$a3 nor $a3,$zero,$a3
or $t4,$s0,$sp or $t4,$s0,$sp
pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40]
rdhwr $sp,$11 rdhwr $sp,$11
round.l.d $f12,$f1 round.l.d $f12,$f1
round.l.s $f25,$f5 round.l.s $f25,$f5
@ -162,6 +164,7 @@
sqrt.s $f0,$f1 sqrt.s $f0,$f1
srav $s1,$s7,$sp srav $s1,$s7,$sp
srlv $t9,$s4,$a0 srlv $t9,$s4,$a0
ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40]
sub $s6,$s3,$t4 sub $s6,$s3,$t4
sub.d $f18,$f3,$f17 sub.d $f18,$f3,$f17
sub.s $f23,$f22,$f22 sub.s $f23,$f22,$f22