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Add DEBUG_VALUE. Not used yet.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93030 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dale Johannesen 2010-01-08 23:51:25 +00:00
parent 306b4cafc1
commit 87563b3937
5 changed files with 28 additions and 6 deletions
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8
include/llvm/Target/Target.td
View File

@ -477,6 +477,14 @@ def COPY_TO_REGCLASS : Instruction {
let neverHasSideEffects = 1;
let isAsCheapAsAMove = 1;
}
def DEBUG_VALUE : Instruction {
let OutOperandList = (ops);
let InOperandList = (ops unknown:$value, i64imm:$offset, unknown:$meta);
let AsmString = "DEBUG_VALUE";
let Namespace = "TargetInstrInfo";
let neverHasSideEffects = 1;
let isAsCheapAsAMove = 1;
}
}
//===----------------------------------------------------------------------===//

5
include/llvm/Target/TargetInstrInfo.h
View File

@ -88,7 +88,10 @@ public:
/// only needed in cases where the register classes implied by the
/// instructions are insufficient. The actual MachineInstrs to perform
/// the copy are emitted with the TargetInstrInfo::copyRegToReg hook.
COPY_TO_REGCLASS = 10
COPY_TO_REGCLASS = 10,
// DEBUG_VALUE - a mapping of the llvm.dbg.value intrinsic
DEBUG_VALUE = 11
};
unsigned getNumOpcodes() const { return NumOpcodes; }

9
utils/TableGen/CodeEmitterGen.cpp
View File

@ -34,7 +34,8 @@ void CodeEmitterGen::reverseBits(std::vector<Record*> &Insts) {
R->getName() == "INSERT_SUBREG" ||
R->getName() == "IMPLICIT_DEF" ||
R->getName() == "SUBREG_TO_REG" ||
R->getName() == "COPY_TO_REGCLASS") continue;
R->getName() == "COPY_TO_REGCLASS" ||
R->getName() == "DEBUG_VALUE") continue;
BitsInit *BI = R->getValueAsBitsInit("Inst");
@ -111,7 +112,8 @@ void CodeEmitterGen::run(raw_ostream &o) {
R->getName() == "INSERT_SUBREG" ||
R->getName() == "IMPLICIT_DEF" ||
R->getName() == "SUBREG_TO_REG" ||
R->getName() == "COPY_TO_REGCLASS") {
R->getName() == "COPY_TO_REGCLASS" ||
R->getName() == "DEBUG_VALUE") {
o << " 0U,\n";
continue;
}
@ -149,7 +151,8 @@ void CodeEmitterGen::run(raw_ostream &o) {
InstName == "INSERT_SUBREG" ||
InstName == "IMPLICIT_DEF" ||
InstName == "SUBREG_TO_REG" ||
InstName == "COPY_TO_REGCLASS") continue;
InstName == "COPY_TO_REGCLASS" ||
InstName == "DEBUG_VALUE") continue;
BitsInit *BI = R->getValueAsBitsInit("Inst");
const std::vector<RecordVal> &Vals = R->getValues();

9
utils/TableGen/CodeGenTarget.cpp
View File

@ -337,6 +337,11 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
throw "Could not find 'COPY_TO_REGCLASS' instruction!";
const CodeGenInstruction *COPY_TO_REGCLASS = &I->second;
I = getInstructions().find("DEBUG_VALUE");
if (I == Instructions.end())
throw "Could not find 'DEBUG_VALUE' instruction!";
const CodeGenInstruction *DEBUG_VALUE = &I->second;
// Print out the rest of the instructions now.
NumberedInstructions.push_back(PHI);
NumberedInstructions.push_back(INLINEASM);
@ -349,6 +354,7 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
NumberedInstructions.push_back(IMPLICIT_DEF);
NumberedInstructions.push_back(SUBREG_TO_REG);
NumberedInstructions.push_back(COPY_TO_REGCLASS);
NumberedInstructions.push_back(DEBUG_VALUE);
for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
if (&II->second != PHI &&
&II->second != INLINEASM &&
@ -360,7 +366,8 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
&II->second != INSERT_SUBREG &&
&II->second != IMPLICIT_DEF &&
&II->second != SUBREG_TO_REG &&
&II->second != COPY_TO_REGCLASS)
&II->second != COPY_TO_REGCLASS &&
&II->second != DEBUG_VALUE)
NumberedInstructions.push_back(&II->second);
}

3
utils/TableGen/InstrInfoEmitter.cpp
View File

@ -345,7 +345,8 @@ void InstrInfoEmitter::emitShiftedValue(Record *R, StringInit *Val,
R->getName() != "INSERT_SUBREG" &&
R->getName() != "IMPLICIT_DEF" &&
R->getName() != "SUBREG_TO_REG" &&
R->getName() != "COPY_TO_REGCLASS")
R->getName() != "COPY_TO_REGCLASS" &&
R->getName() != "DEBUG_VALUE")
throw R->getName() + " doesn't have a field named '" +
Val->getValue() + "'!";
return;