From 87a2f3751c5ff7fff35a028105b0a33f993ccf77 Mon Sep 17 00:00:00 2001 From: Will Newton Date: Wed, 26 Nov 2014 10:49:18 +0000 Subject: [PATCH] Update AArch64 ELF relocations to ABI 1.0 This mostly entails adding relocations, however there are a couple of changes to existing relocations: 1. R_AARCH64_NONE is defined to be zero rather than 256 R_AARCH64_NONE has been defined to be zero for a long time elsewhere e.g. binutils and glibc since the submission of the AArch64 port in 2012 so this is required for compatibility. 2. R_AARCH64_TLSDESC_ADR_PAGE renamed to R_AARCH64_TLSDESC_ADR_PAGE21 I don't think there is any way for relocation names to leak out of LLVM so this should not break anything. Tested with check-all with no regressions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222821 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Support/ELFRelocs/AArch64.def | 50 ++++++++++++++++-- .../MCTargetDesc/AArch64ELFObjectWriter.cpp | 2 +- test/CodeGen/AArch64/arm64-tls-dynamics.ll | 8 +-- test/MC/AArch64/adrp-relocation.s | 2 +- test/MC/AArch64/arm64-elf-relocs.s | 2 +- test/MC/AArch64/arm64-tls-relocs.s | 2 +- test/MC/AArch64/inline-asm-modifiers.s | 2 +- test/MC/AArch64/tls-relocs.s | 2 +- .../Inputs/relocs.obj.elf-aarch64 | Bin 3144 -> 4232 bytes test/tools/llvm-readobj/Inputs/relocs.py | 43 ++++++++++++++- test/tools/llvm-readobj/reloc-types.test | 43 ++++++++++++++- 11 files changed, 139 insertions(+), 17 deletions(-) diff --git a/include/llvm/Support/ELFRelocs/AArch64.def b/include/llvm/Support/ELFRelocs/AArch64.def index f16b283bb1f..aa0c560f3e5 100644 --- a/include/llvm/Support/ELFRelocs/AArch64.def +++ b/include/llvm/Support/ELFRelocs/AArch64.def @@ -3,7 +3,8 @@ #error "ELF_RELOC must be defined" #endif -ELF_RELOC(R_AARCH64_NONE, 0x100) +// ABI release 1.0 +ELF_RELOC(R_AARCH64_NONE, 0) ELF_RELOC(R_AARCH64_ABS64, 0x101) ELF_RELOC(R_AARCH64_ABS32, 0x102) @@ -26,6 +27,7 @@ ELF_RELOC(R_AARCH64_MOVW_SABS_G2, 0x110) ELF_RELOC(R_AARCH64_LD_PREL_LO19, 0x111) ELF_RELOC(R_AARCH64_ADR_PREL_LO21, 0x112) ELF_RELOC(R_AARCH64_ADR_PREL_PG_HI21, 0x113) +ELF_RELOC(R_AARCH64_ADR_PREL_PG_HI21_NC, 0x114) ELF_RELOC(R_AARCH64_ADD_ABS_LO12_NC, 0x115) ELF_RELOC(R_AARCH64_LDST8_ABS_LO12_NC, 0x116) @@ -38,14 +40,45 @@ ELF_RELOC(R_AARCH64_LDST16_ABS_LO12_NC, 0x11c) ELF_RELOC(R_AARCH64_LDST32_ABS_LO12_NC, 0x11d) ELF_RELOC(R_AARCH64_LDST64_ABS_LO12_NC, 0x11e) +ELF_RELOC(R_AARCH64_MOVW_PREL_G0, 0x11f) +ELF_RELOC(R_AARCH64_MOVW_PREL_G0_NC, 0x120) +ELF_RELOC(R_AARCH64_MOVW_PREL_G1, 0x121) +ELF_RELOC(R_AARCH64_MOVW_PREL_G1_NC, 0x122) +ELF_RELOC(R_AARCH64_MOVW_PREL_G2, 0x123) +ELF_RELOC(R_AARCH64_MOVW_PREL_G2_NC, 0x124) +ELF_RELOC(R_AARCH64_MOVW_PREL_G3, 0x125) + ELF_RELOC(R_AARCH64_LDST128_ABS_LO12_NC, 0x12b) +ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G0, 0x12c) +ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G0_NC, 0x12d) +ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G1, 0x12e) +ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G1_NC, 0x12f) +ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G2, 0x130) +ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G2_NC, 0x131) +ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G3, 0x132) + ELF_RELOC(R_AARCH64_GOTREL64, 0x133) ELF_RELOC(R_AARCH64_GOTREL32, 0x134) +ELF_RELOC(R_AARCH64_GOT_LD_PREL19, 0x135) +ELF_RELOC(R_AARCH64_LD64_GOTOFF_LO15, 0x136) ELF_RELOC(R_AARCH64_ADR_GOT_PAGE, 0x137) ELF_RELOC(R_AARCH64_LD64_GOT_LO12_NC, 0x138) +ELF_RELOC(R_AARCH64_LD64_GOTPAGE_LO15, 0x139) +ELF_RELOC(R_AARCH64_TLSGD_ADR_PREL21, 0x200) +ELF_RELOC(R_AARCH64_TLSGD_ADR_PAGE21, 0x201) +ELF_RELOC(R_AARCH64_TLSGD_ADD_LO12_NC, 0x202) +ELF_RELOC(R_AARCH64_TLSGD_MOVW_G1, 0x203) +ELF_RELOC(R_AARCH64_TLSGD_MOVW_G0_NC, 0x204) + +ELF_RELOC(R_AARCH64_TLSLD_ADR_PREL21, 0x205) +ELF_RELOC(R_AARCH64_TLSLD_ADR_PAGE21, 0x206) +ELF_RELOC(R_AARCH64_TLSLD_ADD_LO12_NC, 0x207) +ELF_RELOC(R_AARCH64_TLSLD_MOVW_G1, 0x208) +ELF_RELOC(R_AARCH64_TLSLD_MOVW_G0_NC, 0x209) +ELF_RELOC(R_AARCH64_TLSLD_LD_PREL19, 0x20a) ELF_RELOC(R_AARCH64_TLSLD_MOVW_DTPREL_G2, 0x20b) ELF_RELOC(R_AARCH64_TLSLD_MOVW_DTPREL_G1, 0x20c) ELF_RELOC(R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC, 0x20d) @@ -86,12 +119,23 @@ ELF_RELOC(R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC, 0x22d) ELF_RELOC(R_AARCH64_TLSLE_LDST64_TPREL_LO12, 0x22e) ELF_RELOC(R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC, 0x22f) -ELF_RELOC(R_AARCH64_TLSDESC_ADR_PAGE, 0x232) +ELF_RELOC(R_AARCH64_TLSDESC_LD_PREL19, 0x230) +ELF_RELOC(R_AARCH64_TLSDESC_ADR_PREL21, 0x231) +ELF_RELOC(R_AARCH64_TLSDESC_ADR_PAGE21, 0x232) ELF_RELOC(R_AARCH64_TLSDESC_LD64_LO12_NC, 0x233) ELF_RELOC(R_AARCH64_TLSDESC_ADD_LO12_NC, 0x234) - +ELF_RELOC(R_AARCH64_TLSDESC_OFF_G1, 0x235) +ELF_RELOC(R_AARCH64_TLSDESC_OFF_G0_NC, 0x236) +ELF_RELOC(R_AARCH64_TLSDESC_LDR, 0x237) +ELF_RELOC(R_AARCH64_TLSDESC_ADD, 0x238) ELF_RELOC(R_AARCH64_TLSDESC_CALL, 0x239) +ELF_RELOC(R_AARCH64_TLSLE_LDST128_TPREL_LO12, 0x23a) +ELF_RELOC(R_AARCH64_TLSLE_LDST128_TPREL_LO12_NC, 0x23b) + +ELF_RELOC(R_AARCH64_TLSLD_LDST128_DTPREL_LO12, 0x23c) +ELF_RELOC(R_AARCH64_TLSLD_LDST128_DTPREL_LO12_NC, 0x23d) + ELF_RELOC(R_AARCH64_COPY, 0x400) ELF_RELOC(R_AARCH64_GLOB_DAT, 0x401) ELF_RELOC(R_AARCH64_JUMP_SLOT, 0x402) diff --git a/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp b/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp index e05191eaf3e..5ea49c3b1a7 100644 --- a/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp +++ b/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp @@ -78,7 +78,7 @@ unsigned AArch64ELFObjectWriter::GetRelocType(const MCValue &Target, if (SymLoc == AArch64MCExpr::VK_GOTTPREL && !IsNC) return ELF::R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21; if (SymLoc == AArch64MCExpr::VK_TLSDESC && !IsNC) - return ELF::R_AARCH64_TLSDESC_ADR_PAGE; + return ELF::R_AARCH64_TLSDESC_ADR_PAGE21; llvm_unreachable("invalid symbol kind for ADRP relocation"); case AArch64::fixup_aarch64_pcrel_branch26: return ELF::R_AARCH64_JUMP26; diff --git a/test/CodeGen/AArch64/arm64-tls-dynamics.ll b/test/CodeGen/AArch64/arm64-tls-dynamics.ll index e8a83fd7db3..30ea63b4664 100644 --- a/test/CodeGen/AArch64/arm64-tls-dynamics.ll +++ b/test/CodeGen/AArch64/arm64-tls-dynamics.ll @@ -20,7 +20,7 @@ define i32 @test_generaldynamic() { ; CHECK: mrs x[[TP:[0-9]+]], TPIDR_EL0 ; CHECK: ldr w0, [x[[TP]], x0] -; CHECK-RELOC: R_AARCH64_TLSDESC_ADR_PAGE +; CHECK-RELOC: R_AARCH64_TLSDESC_ADR_PAGE21 ; CHECK-RELOC: R_AARCH64_TLSDESC_ADD_LO12_NC ; CHECK-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC ; CHECK-RELOC: R_AARCH64_TLSDESC_CALL @@ -43,7 +43,7 @@ define i32* @test_generaldynamic_addr() { ; CHECK: mrs [[TP:x[0-9]+]], TPIDR_EL0 ; CHECK: add x0, [[TP]], x0 -; CHECK-RELOC: R_AARCH64_TLSDESC_ADR_PAGE +; CHECK-RELOC: R_AARCH64_TLSDESC_ADR_PAGE21 ; CHECK-RELOC: R_AARCH64_TLSDESC_ADD_LO12_NC ; CHECK-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC ; CHECK-RELOC: R_AARCH64_TLSDESC_CALL @@ -73,7 +73,7 @@ define i32 @test_localdynamic() { ; CHECK: ldr w0, [x[[TPIDR]], x[[TPREL]]] -; CHECK-RELOC: R_AARCH64_TLSDESC_ADR_PAGE +; CHECK-RELOC: R_AARCH64_TLSDESC_ADR_PAGE21 ; CHECK-RELOC: R_AARCH64_TLSDESC_ADD_LO12_NC ; CHECK-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC ; CHECK-RELOC: R_AARCH64_TLSDESC_CALL @@ -101,7 +101,7 @@ define i32* @test_localdynamic_addr() { ; CHECK: add x0, [[TPIDR]], [[TPREL]] -; CHECK-RELOC: R_AARCH64_TLSDESC_ADR_PAGE +; CHECK-RELOC: R_AARCH64_TLSDESC_ADR_PAGE21 ; CHECK-RELOC: R_AARCH64_TLSDESC_ADD_LO12_NC ; CHECK-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC ; CHECK-RELOC: R_AARCH64_TLSDESC_CALL diff --git a/test/MC/AArch64/adrp-relocation.s b/test/MC/AArch64/adrp-relocation.s index 3bcef34e4f5..3bc6039d5f1 100644 --- a/test/MC/AArch64/adrp-relocation.s +++ b/test/MC/AArch64/adrp-relocation.s @@ -15,4 +15,4 @@ sym: // CHECK: R_AARCH64_ADR_PREL_PG_HI21 sym // CHECK: R_AARCH64_ADR_GOT_PAGE sym // CHECK: R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 sym -// CHECK: R_AARCH64_TLSDESC_ADR_PAGE sym +// CHECK: R_AARCH64_TLSDESC_ADR_PAGE21 sym diff --git a/test/MC/AArch64/arm64-elf-relocs.s b/test/MC/AArch64/arm64-elf-relocs.s index eb22cc2f236..612819cc553 100644 --- a/test/MC/AArch64/arm64-elf-relocs.s +++ b/test/MC/AArch64/arm64-elf-relocs.s @@ -77,7 +77,7 @@ adrp x2, :tlsdesc:sym // CHECK: adrp x2, :tlsdesc:sym -// CHECK-OBJ: 58 R_AARCH64_TLSDESC_ADR_PAGE sym +// CHECK-OBJ: 58 R_AARCH64_TLSDESC_ADR_PAGE21 sym // LLVM is not competent enough to do this relocation because the // page boundary could occur anywhere after linking. A relocation diff --git a/test/MC/AArch64/arm64-tls-relocs.s b/test/MC/AArch64/arm64-tls-relocs.s index 96c2b55c36d..be7e24a6a3f 100644 --- a/test/MC/AArch64/arm64-tls-relocs.s +++ b/test/MC/AArch64/arm64-tls-relocs.s @@ -304,7 +304,7 @@ // CHECK: blr x3 // encoding: [0x60,0x00,0x3f,0xd6] -// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSDESC_ADR_PAGE [[VARSYM]] +// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSDESC_ADR_PAGE21 [[VARSYM]] // CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSDESC_LD64_LO12_NC [[VARSYM]] // CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSDESC_ADD_LO12_NC [[VARSYM]] // CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSDESC_CALL [[VARSYM]] diff --git a/test/MC/AArch64/inline-asm-modifiers.s b/test/MC/AArch64/inline-asm-modifiers.s index cf34a952e90..c3ba1cf6287 100644 --- a/test/MC/AArch64/inline-asm-modifiers.s +++ b/test/MC/AArch64/inline-asm-modifiers.s @@ -73,7 +73,7 @@ test_inline_modifier_A: // @test_inline_modifier_A .size test_inline_modifier_A, .Ltmp2-test_inline_modifier_A // CHECK: R_AARCH64_ADR_PREL_PG_HI21 var_simple // CHECK: R_AARCH64_ADR_GOT_PAGE var_got -// CHECK: R_AARCH64_TLSDESC_ADR_PAGE var_tlsgd +// CHECK: R_AARCH64_TLSDESC_ADR_PAGE21 var_tlsgd // CHECK: R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 var_tlsie .globl test_inline_modifier_wx diff --git a/test/MC/AArch64/tls-relocs.s b/test/MC/AArch64/tls-relocs.s index ebf02167a8f..9e94a52e5af 100644 --- a/test/MC/AArch64/tls-relocs.s +++ b/test/MC/AArch64/tls-relocs.s @@ -391,7 +391,7 @@ // CHECK: // fixup A - offset: 0, value: var, kind: fixup_aarch64_tlsdesc_call // CHECK: blr x3 // encoding: [0x60,0x00,0x3f,0xd6] -// CHECK-ELF-NEXT: 0x104 R_AARCH64_TLSDESC_ADR_PAGE [[VARSYM]] +// CHECK-ELF-NEXT: 0x104 R_AARCH64_TLSDESC_ADR_PAGE21 [[VARSYM]] // CHECK-ELF-NEXT: 0x108 R_AARCH64_TLSDESC_LD64_LO12_NC [[VARSYM]] // CHECK-ELF-NEXT: 0x10C R_AARCH64_TLSDESC_ADD_LO12_NC [[VARSYM]] // CHECK-ELF-NEXT: 0x110 R_AARCH64_TLSDESC_CALL [[VARSYM]] diff --git a/test/tools/llvm-readobj/Inputs/relocs.obj.elf-aarch64 b/test/tools/llvm-readobj/Inputs/relocs.obj.elf-aarch64 index a1034cb77f55893dfc3ecea8af7b8b5fb3220d74..658b0ea6227ab9337ba6332c679714ef4d219319 100644 GIT binary patch literal 4232 zcmeI!D@^m8KNL=!WK{7l!80p4SDtJ3&c7XBoMx;`jyHdgHGF~XaGKp`>6RMTLN_!v?3T7A z{QqlQ8+m*>NWpOQuvs>3_dO|hfl~W;Gg7`@VLARJ|(Y) z&&X@wv+`Q_yu1#cl-I)-dyb-=CZ-TGMo8jy77Wjs|6}~BNhi}O{;M?*} z_>MdZ-<5a4_vGF1eR&W3K;8>Kl=s1p{1?pU&({;@A44*TAl&Fk!QkhroJb~M}w5W!U$ZOy+c`f{%ybk_RUJoCYKZTFU8{p&eM)-uh3I0jm43EoO;8XHe z_>BA+d{+J(J}+;BC*?2Ti}IK7WqCV%MQ*<*{rO>4-U(lmN8#)8F8GGL8@?&;fp5us z;oI^)_>R0EzAGPq@5u+@`|?-t1NjjAP(BPllD~!@%iq9Hs1Q)x1KjTC4BW zE9-vEmAl&q?Tt#ka`=Y+t`_sB+bgy*7-cn90`K1_DtCo-)2y#5+>f_Mx^)umrZ=WC z=a+Vkh}y1bVqNE4tJm+aYyRo{REN2?mRtXlH3GqH&G>!cK)c{e;S?|~QPz3`H} z4?ZvNhcCzn;AMFdz9>(@m*j)+W%&?%MLrB)m5;#Ja|q3SO7z;0^g4{IdAQ|S ziyYkYqeUKWdClSiJS{K4Ex%Y?gj>F_xD20`&%v|u5`0#E6`q&dUup1M7v&+i